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From: "Kuppuswamy, Sathyanarayanan"  <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: bhelgaas@google.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, ashok.raj@intel.com
Subject: Re: [PATCH v8 1/5] PCI: Conditionally initialize host bridge native_* members
Date: Sun, 13 Sep 2020 13:49:26 -0700	[thread overview]
Message-ID: <8e9c26fb-97e9-4bda-e374-7c6bea9077eb@linux.intel.com> (raw)
In-Reply-To: <f1655ddf-35dc-424e-1df4-f3821ab7500e@linux.intel.com>



On 9/10/20 2:00 PM, Kuppuswamy, Sathyanarayanan wrote:
> 
> 
> On 9/10/20 12:49 PM, Bjorn Helgaas wrote:
>> On Fri, Jul 24, 2020 at 08:58:52PM -0700, sathyanarayanan.kuppuswamy@linux.intel.com wrote:
>>> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>>>
>>> If CONFIG_PCIEPORTBUS is not enabled in kernel then initialing
>>> struct pci_host_bridge PCIe specific native_* members to "1" is
>>> incorrect. So protect the PCIe specific member initialization
>>> with CONFIG_PCIEPORTBUS.
>>
>> s/initialing/initializing/
> will fix it in next version.
>>
>>> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>>> ---
>>>   drivers/pci/probe.c | 4 +++-
>>>   1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>>> index 2f66988cea25..a94b97564ceb 100644
>>> --- a/drivers/pci/probe.c
>>> +++ b/drivers/pci/probe.c
>>> @@ -588,12 +588,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
>>>        * may implement its own AER handling and use _OSC to prevent the
>>>        * OS from interfering.
>>>        */
>>> +#ifdef CONFIG_PCIEPORTBUS
>>>       bridge->native_aer = 1;
>>>       bridge->native_pcie_hotplug = 1;
>>> -    bridge->native_shpc_hotplug = 1;
>>>       bridge->native_pme = 1;
>>>       bridge->native_ltr = 1;
>>
>> native_ltr isn't dependent on PCIEPORTBUS either, is it?  It's only
>> used for ASPM.
> Agreed. I was confused due to a comment in include/linux/pci.h
> 
>   unsigned int    native_ltr:1;           /* OS may use PCIe LTR */
Currently there is no code dependency between LTR and CONFIG_PCIEPORTBUS.

But I am wondering whether its correct to move LTR code under
CONFIG_PCIEPORTBUS?. As per PCIe spec v5.0 sec 7.8.2, LTR is a optional
PCIe extended capability. So why is not moved under drivers/pci/pcie/*. What is
the criteria for code to be placed under drivers/pci/pcie/*
> 
>>
>>>       bridge->native_dpc = 1;
>>> +#endif
>>> +    bridge->native_shpc_hotplug = 1;
>>>       device_initialize(&bridge->dev);
>>>   }
>>> -- 
>>> 2.17.1
>>>
> 

-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer

  reply	other threads:[~2020-09-13 20:49 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-25  3:58 [PATCH v8 0/5] Simplify PCIe native ownership detection logic sathyanarayanan.kuppuswamy
2020-07-25  3:58 ` [PATCH v8 1/5] PCI: Conditionally initialize host bridge native_* members sathyanarayanan.kuppuswamy
2020-09-10 19:49   ` Bjorn Helgaas
2020-09-10 21:00     ` Kuppuswamy, Sathyanarayanan
2020-09-13 20:49       ` Kuppuswamy, Sathyanarayanan [this message]
2020-09-15 22:17         ` Bjorn Helgaas
2020-09-16  2:30           ` Kuppuswamy, Sathyanarayanan
2020-07-25  3:58 ` [PATCH v8 2/5] ACPI/PCI: Ignore _OSC negotiation result if pcie_ports_native is set sathyanarayanan.kuppuswamy
2020-07-25 10:35   ` Andy Shevchenko
2020-09-10 20:14   ` Bjorn Helgaas
2020-09-13 20:54     ` Kuppuswamy, Sathyanarayanan
2020-09-15 22:20       ` Bjorn Helgaas
2020-09-16  2:33         ` Kuppuswamy, Sathyanarayanan
2020-07-25  3:58 ` [PATCH v8 3/5] ACPI/PCI: Ignore _OSC DPC negotiation result if pcie_ports_dpc_native " sathyanarayanan.kuppuswamy
2020-07-25  3:58 ` [PATCH v8 4/5] PCI/portdrv: Remove redundant pci_aer_available() check in DPC enable logic sathyanarayanan.kuppuswamy
2020-07-25  3:58 ` [PATCH v8 5/5] PCI/DPC: Move AER/DPC dependency checks out of DPC driver sathyanarayanan.kuppuswamy
2020-07-25 10:38   ` Andy Shevchenko
2020-08-27 18:22 ` [PATCH v8 0/5] Simplify PCIe native ownership detection logic Kuppuswamy, Sathyanarayanan

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