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From: Ilkka Koskinen <ilkka@os.amperecomputing.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: Ilkka Koskinen <ilkka@os.amperecomputing.com>,
	 Besar Wicaksono <bwicaksono@nvidia.com>,
	 Suzuki K Poulose <suzuki.poulose@arm.com>,
	Will Deacon <will@kernel.org>,
	 Mark Rutland <mark.rutland@arm.com>,
	Raag Jadav <raag.jadav@intel.com>,
	 linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] perf: arm_cspmu: Don't touch interrupt registers if no interrupt was assigned
Date: Mon, 8 Apr 2024 18:05:11 -0700 (PDT)	[thread overview]
Message-ID: <8fdfceb2-90b3-a1a9-fa88-a45ece30c0bb@os.amperecomputing.com> (raw)
In-Reply-To: <c2e3e77c-ba50-4228-9eb8-c8fbcc84edfb@arm.com>


On Mon, 8 Apr 2024, Robin Murphy wrote:
> On 2024-04-05 11:33 pm, Ilkka Koskinen wrote:
>> 
>> On Fri, 5 Apr 2024, Robin Murphy wrote:
>>> On 2024-03-07 7:31 pm, Ilkka Koskinen wrote:
>>>> The driver enabled and disabled interrupts even if no interrupt was
>>>> assigned to the device.
>>> 
>>> Why's that a concern - if the interrupt isn't routed anywhere, surely it 
>>> makes no difference what happens at the source end?
>> 
>> The issue is that we have two PMUs attached to the same interrupt line.
>> Unfortunately, I just don't seem to find time to add support for shared 
>> interrupts to the cspmu driver. Meanwhile, I assigned the interrupt to one 
>> of the PMUs while the other one has zero in the APMT table.
>
> I suspected something like that ;)
>
>> Without the patch, I can trigger "ghost interrupt" in the latter PMU.
>
> An occasional spurious interrupt should be no big deal. If it ends up as a 
> screaming spurious interrupt because we never handle the overflow condition 
> on the "other" PMU, then what matters most is that we never handle the 
> overflow, thus the "other" PMU is still useless since you can't assume the 
> user is going to read it frequently enough to avoid losing information and 
> getting nonsense counts back. So this hack really isn't a viable solution for 
> anything.

IIRC, what happens is that kernel will disable the interrupt eventually 
due to unhandled spurious interrupts making the "working" PMU also 
useless.

Cheers, Ilkka

>
> Thanks,
> Robin.
>

  reply	other threads:[~2024-04-09  1:07 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-07 19:31 [PATCH] perf: arm_cspmu: Don't touch interrupt registers if no interrupt was assigned Ilkka Koskinen
2024-04-04 20:35 ` Ilkka Koskinen
2024-04-05 10:33 ` Robin Murphy
2024-04-05 22:33   ` Ilkka Koskinen
2024-04-08 12:05     ` Robin Murphy
2024-04-09  1:05       ` Ilkka Koskinen [this message]
2024-04-09 12:53         ` Robin Murphy
2024-04-11  7:35           ` Ilkka Koskinen

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