From: David Brown <davidb@codeaurora.org>
To: Rohit Vaswani <rvaswani@codeaurora.org>
Cc: bryanh@codeaurora.org, linux@arm.linux.org.uk,
dwalker@fifo99.com, dima@android.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH] msm: gpio-v2: Add missing BIT field macros for interrupt control
Date: Thu, 10 Mar 2011 12:37:59 -0800 [thread overview]
Message-ID: <8yaoc5i90ew.fsf@huya.qualcomm.com> (raw)
In-Reply-To: <1299522832-31233-1-git-send-email-rvaswani@codeaurora.org> (Rohit Vaswani's message of "Mon, 7 Mar 2011 10:33:52 -0800")
On Mon, Mar 07 2011, Rohit Vaswani wrote:
> The gpio-v2 file was missing the BIT field macros causing incorrect
> values to be written at incorrect offsets within the TLMM block registers.
> These registers are used for masking/unmasking interrupts and configuring them
> This change fixes that problem.
>
> Change-Id: Ib538a2d09bca039b058627ddc309a7faaaf6bc8d
> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Please remember to remove these Change-Id lines from patches before
sending them out. I'll remove them from these patches, since there
don't seem to be any other comments.
Thanks,
David
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
prev parent reply other threads:[~2011-03-10 20:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-07 18:33 [PATCH] msm: gpio-v2: Add missing BIT field macros for interrupt control Rohit Vaswani
2011-03-10 20:37 ` David Brown [this message]
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