From: Heiko Stuebner <heiko@sntech.de>
To: Xing Zheng <zhengxing@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org, huangtao@rock-chips.com,
jay.xu@rock-chips.com, elaine.zhang@rock-chips.com,
dianders@chromium.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 4/4] clk: rockchip: add clock controller for the RK3399
Date: Mon, 28 Mar 2016 02:13:34 +0200 [thread overview]
Message-ID: <9181730.v9nyazlRXy@phil> (raw)
In-Reply-To: <1458974276-10325-5-git-send-email-zhengxing@rock-chips.com>
Hi Xing,
Am Samstag, 26. März 2016, 14:37:56 schrieb Xing Zheng:
> Add the clock tree definition for the new RK3399 SoC.
>
> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
> ---
[...]
> + /*
> + * We use pclkin_cifinv by default GRF_SOC_CON20[9] (GSC20_9) setting in
> system, + * so we ignore the mux and make clocks nodes as following,
> + *
> + * pclkin_cifinv --|-------\
> + * |GSC20_9|-- pclkin_cifmux
> + * pclkin_cif --|-------/
> + */
> + GATE(PCLK_ISP1_WRAPPER, "pclkin_isp1_wrapper", "pclkin_cifmux",
please name that source clock pclkin_cif as in the TRM.
pclkin_cif is the actual input clock - if I'm reading the TRM correctly and
the inverter is part of the soc or so?
That we currently hide / hardcode the phase-handling should not be part of
our outside connection - which should be stable even if we implement this
later.
Heiko
next prev parent reply other threads:[~2016-03-28 0:13 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-26 6:37 [PATCH v5 0/4] Add more clock compatible features and support the RK3399 clock Xing Zheng
2016-03-26 6:37 ` [PATCH v5 1/4] clk: rockchip: fix big.LITTLE cores alternate reparent failed Xing Zheng
2016-03-26 8:26 ` kbuild test robot
2016-03-27 21:26 ` Heiko Stübner
2016-03-26 6:37 ` [PATCH v5 2/4] dt-bindings: add bindings for rk3399 clock controller Xing Zheng
2016-03-27 23:52 ` Heiko Stübner
2016-03-28 0:07 ` Heiko Stuebner
2016-03-28 3:24 ` Xing Zheng
2016-03-28 2:51 ` Xing Zheng
2016-03-26 6:37 ` [PATCH v5 3/4] clk: rockchip: add dt-binding header for rk3399 Xing Zheng
2016-03-26 6:37 ` [PATCH v5 4/4] clk: rockchip: add clock controller for the RK3399 Xing Zheng
2016-03-26 8:41 ` kbuild test robot
2016-03-28 0:13 ` Heiko Stuebner [this message]
2016-03-28 6:11 ` Xing Zheng
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