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client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by SJ5PEPF000001F1.mail.protection.outlook.com (10.167.242.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.360.3 via Frontend Transport; Mon, 24 Aug 2026 06:21:41 +0000 Received: from satlexmb10.amd.com (10.181.42.219) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45; Mon, 24 Aug 2026 01:21:41 -0500 Received: from satlexmb07.amd.com (10.181.42.216) by satlexmb10.amd.com (10.181.42.219) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45; Mon, 24 Aug 2026 01:21:41 -0500 Received: from [192.168.1.7] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server id 15.2.2562.45 via Frontend Transport; Mon, 24 Aug 2026 01:21:36 -0500 Message-ID: <930eccc8-23ca-44c8-b91d-3567708e317f@amd.com> Date: Mon, 24 Aug 2026 11:51:34 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 00/22] Enable FRED with KVM VMX To: "Xin Li (Intel)" , , , CC: , , , , , , , , , , , , , , References: <20251026201911.505204-1-xin@zytor.com> Content-Language: en-US From: Shivansh Dhiman In-Reply-To: <20251026201911.505204-1-xin@zytor.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Kf6qCUkYZkp+g0NlPX4rakP8+zxQMH+ZMd+20uamcgMVNZU54aHVoy6IoySzR3fVdb9j4+mc8xVnUfu0Hm9vqE0ImPPqoyjFHE/JycMK23qjJhXJO3H1loFZy8Ic3FCI5NLTMClNwHHjc5m+Co6TZM9x6Yl/2zZ0Nof2IsUMmMjxfoJ4lLE0Jf04QbUyKcJ4ZcyqisgPVwc6KDe27S2NVfFl2fU7FtxIWeQ69H+78pEZFHhO0SiDDTM86ve70EWY4HLzfKPBdhm4EUvhYxina9uu7bIyhpkMPkK6jMqxuf+evEfsANHodqxCkAdGt+CydRaWnmzKztGJ4+TBVdtOH/ir/1iqPeCY+jK3ypxiq3BcBghyy8BiyWqXsDAZUq79VJkgB3RhBCXz5CoHh2AF6EIcy9gr3zTJQI9nnBl4+Vg2eWmdVY86QylgmSYjgiT/ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Aug 2026 06:21:41.9849 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 83b9b3e2-de28-4259-3be8-08df01a7f6bb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001F1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7265 On 27-10-25 01:48, Xin Li (Intel) wrote: > This patch set enables the Intel flexible return and event delivery > (FRED) architecture with KVM VMX to allow guests to utilize FRED. > > The FRED architecture defines simple new transitions that change > privilege level (ring transitions). The FRED architecture was > designed with the following goals: > > 1) Improve overall performance and response time by replacing event > delivery through the interrupt descriptor table (IDT event > delivery) and event return by the IRET instruction with lower > latency transitions. > > 2) Improve software robustness by ensuring that event delivery > establishes the full supervisor context and that event return > establishes the full user context. > > The new transitions defined by the FRED architecture are FRED event > delivery and, for returning from events, two FRED return instructions. > FRED event delivery can effect a transition from ring 3 to ring 0, but > it is used also to deliver events incident to ring 0. One FRED > instruction (ERETU) effects a return from ring 0 to ring 3, while the > other (ERETS) returns while remaining in ring 0. Collectively, FRED > event delivery and the FRED return instructions are FRED transitions. > > > Intel VMX architecture is extended to run FRED guests, and the major > changes are: > > 1) New VMCS fields for FRED context management, which includes two new > event data VMCS fields, eight new guest FRED context VMCS fields and > eight new host FRED context VMCS fields. > > 2) VMX nested-exception support for proper virtualization of stack > levels introduced with FRED architecture. > > Search for the latest FRED spec in most search engines with this search > pattern: > > site:intel.com FRED (flexible return and event delivery) specification > > > Although FRED and CET supervisor shadow stacks are independent CPU > features, FRED unconditionally includes FRED shadow stack pointer > MSRs IA32_FRED_SSP[0123], and IA32_FRED_SSP0 is just an alias of the > CET MSR IA32_PL0_SSP. IOW, the state management of MSR IA32_PL0_SSP > becomes an overlap area, and Sean requested that FRED virtualization > to land after CET virtualization [1]. > > With CET virtualization now merged in v6.18, the path is clear to submit > the FRED virtualization patch series :). > > > Changes in v9: > * Rebased to the latest kvm-x86/next branch, tag kvm-x86-next-2025.10.20-2. > * Guard FRED state save/restore with guest_cpu_cap_has(vcpu, X86_FEATURE_FRED) > in patch 19 (syzbot & Chao). > * Use array indexing for exception stack access, eliminating the need for > the ESTACKS_MEMBERS() macro in struct cea_exception_stacks, and then > exported __this_cpu_ist_top_va() in a subsequent patch (Dave Hansen). > * Rewrote some of the change logs. > > > Following is the link to v8 of this patch set: > https://lore.kernel.org/lkml/20251014010950.1568389-1-xin@zytor.com/ > > > [1]: https://lore.kernel.org/kvm/ZvQaNRhrsSJTYji3@google.com/ Hi Xin, Any rough idea when v10 might go out? I'm about to post v3 of the SVM side and would rather base it on your latest than on v9, so happy to wait if it's close. If it's likely to be a while, a question for the maintainers: would it be reasonable for me to carry the common vFRED parts of this series as prerequisites in my posting, with authorship and tags intact? Some would need splitting out of the VMX patches, so only if Xin is fine with it. Thanks, Shivansh