From: "H. Peter Anvin" <hpa@zytor.com>
To: linux-kernel@vger.kernel.org
Subject: Re: x86 PAT errata
Date: 25 Jan 2001 14:28:32 -0800 [thread overview]
Message-ID: <94q9ag$9bs$1@cesium.transmeta.com> (raw)
In-Reply-To: <200101251745.SAA07063@harpo.it.uu.se>
Followup to: <200101251745.SAA07063@harpo.it.uu.se>
By author: Mikael Pettersson <mikpe@csd.uu.se>
In newsgroup: linux.dev.kernel
>
> Before people get too exited about the x86 Page Attribute Table ...
> Does Linux use mode B (CR4.PSE=1) or mode C (CR4.PAE=1) paging?
> If so, known P6 errata must be taken into account.
> In particular, Pentium III errata E27 and Pentium II errata A56
> imply that only the low four PAT entries are working for 4KB
> pages, if CR4.PSE or CR4.PAE is enabled.
>
All of the above. Sounds like PAT should be declared broken on these
chips.
-hpa
--
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"Unix gives you enough rope to shoot yourself in the foot."
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next prev parent reply other threads:[~2001-01-25 22:29 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-01-25 17:45 x86 PAT errata Mikael Pettersson
2001-01-25 17:51 ` Jeff Hartmann
2001-01-25 22:28 ` H. Peter Anvin [this message]
2001-01-26 0:35 ` Jeff Hartmann
-- strict thread matches above, loose matches on Subject: below --
2001-01-25 18:12 Mikael Pettersson
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