[PATCH hyperv-next v6 07/11] dt-bindings: microsoft,vmbus: Add interrupt and DMA coherence properties

Roman Kisel
2025-03-15T00:19:36Z

To boot in the VTL mode, VMBus on arm64 needs interrupt description
which the binding documentation lacks. The transactions on the bus are
DMA coherent which is not mentioned as well.

Add the interrupt property and the DMA coherence property to the VMBus
binding. Update the example to match that. Fix typos.

Signed-off-by: Roman Kisel <romank@linux.microsoft.com>
---
.../bindings/bus/microsoft,vmbus.yaml | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml b/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml
index a8d40c766dcd..ca288ea54b34 100644
--- a/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml
+++ b/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml
@@ -10,8 +10,8 @@ maintainers:
- Saurabh Sengar <ssengar@linux.microsoft.com>

description:
- VMBus is a software bus that implement the protocols for communication
- between the root or host OS and guest OSs (virtual machines).
+ VMBus is a software bus that implements the protocols for communication
+ between the root or host OS and guest OS'es (virtual machines).

properties:
compatible:
@@ -25,9 +25,17 @@ properties:
'#size-cells':
const: 1

+ dma-coherent: true
+
+ interrupts:
+ maxItems: 1
+ description: |
+ This interrupt is used to report a message from the host.
+
required:
- compatible
- ranges
+ - interrupts
- '#address-cells'
- '#size-cells'

@@ -35,6 +43,8 @@ additionalProperties: false

examples:
- |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <2>;
#size-cells = <1>;
@@ -49,6 +59,9 @@ examples:
#address-cells = <2>;
#size-cells = <1>;
ranges = <0x0f 0xf0000000 0x0f 0xf0000000 0x10000000>;
+ dma-coherent;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_PPI 2 IRQ_TYPE_EDGE_RISING>;
};
};
};
--
2.43.0