From: kan.liang@intel.com
To: a.p.zijlstra@chello.nl, eranian@google.com
Cc: linux-kernel@vger.kernel.org, mingo@redhat.com, paulus@samba.org,
acme@kernel.org, ak@linux.intel.com, kan.liang@intel.com, "Yan,
Zheng" <zheng.z.yan@intel.com>
Subject: [PATCH V5 06/16] perf, core: always switch pmu specific data during context switch
Date: Sun, 7 Jan 2001 21:29:35 -0500 [thread overview]
Message-ID: <978920978-30191-7-git-send-email-kan.liang@intel.com> (raw)
In-Reply-To: <978920978-30191-1-git-send-email-kan.liang@intel.com>
From: Kan Liang <kan.liang@intel.com>
If two tasks were both forked from the same parent task, Events in
their perf task contexts can be the same. Perf core may leave out
switching the perf event contexts.
Previous patch inroduces pmu specific data. The data is for saving
the LBR stack, it is task specific. So we need to switch the data
even when context switch is optimized out.
Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
---
kernel/events/core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 3a1458c..5f49df2 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -2412,6 +2412,9 @@ static void perf_event_context_sched_out(struct task_struct *task, int ctxn,
next->perf_event_ctxp[ctxn] = ctx;
ctx->task = next;
next_ctx->task = task;
+
+ swap(ctx->task_ctx_data, next_ctx->task_ctx_data);
+
do_switch = 0;
perf_event_sync_stat(ctx, next_ctx);
--
1.8.3.2
next prev parent reply other threads:[~2014-09-10 2:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-01-08 2:29 [PATCH V5 00/16] perf, x86: Haswell LBR call stack support kan.liang
2001-01-08 2:29 ` [PATCH V5 01/16] perf, x86: Reduce lbr_sel_map size kan.liang
2001-01-08 2:29 ` [PATCH V5 02/16] perf, core: introduce pmu context switch callback kan.liang
2014-09-27 16:47 ` Frederic Weisbecker
2014-09-29 9:36 ` Peter Zijlstra
2001-01-08 2:29 ` [PATCH V5 03/16] perf, x86: use context switch callback to flush LBR stack kan.liang
2001-01-08 2:29 ` [PATCH V5 04/16] perf, x86: Basic Haswell LBR call stack support kan.liang
2001-01-08 2:29 ` [PATCH V5 05/16] perf, core: pmu specific data for perf task context kan.liang
2001-01-08 2:29 ` kan.liang [this message]
2001-01-08 2:29 ` [PATCH V5 07/16] perf, x86: allocate space for storing LBR stack kan.liang
2001-01-08 2:29 ` [PATCH V5 08/16] perf, x86: track number of events that use LBR callstack kan.liang
2001-01-08 2:29 ` [PATCH V5 09/16] perf, x86: Save/resotre LBR stack during context switch kan.liang
-- strict thread matches above, loose matches on Subject: below --
2014-07-07 6:28 [PATCH v5 00/16] perf, x86: Haswell LBR call stack support Yan, Zheng
2014-07-07 6:28 ` [PATCH v5 06/16] perf, core: always switch pmu specific data during context switch Yan, Zheng
2014-09-10 14:08 [PATCH V5 00/16] perf, x86: Haswell LBR call stack support kan.liang
2014-09-10 14:09 ` [PATCH V5 06/16] perf, core: always switch pmu specific data during context switch kan.liang
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