Re: [PATCH V2 1/5] perf mem: Add mem_events into the supported perf_pmu

Liang, Kan
2023-12-08T18:15:20Z

On 2023-12-08 5:29 a.m., Leo Yan wrote:
> On Thu, Dec 07, 2023 at 11:23:34AM -0800, kan.liang@linux.intel.com wrote:
>> From: Kan Liang <kan.liang@linux.intel.com>
>>
>> With the mem_events, perf doesn't need to read sysfs for each PMU to
>> find the mem-events-supported PMU. The patch also makes it possible to
>> clean up the related __weak functions later.
>>
>> The patch is only to add the mem_events into the perf_pmu for all ARCHs.
>> It will be used in the later cleanup patches.
>>
>> Reviewed-by: Ian Rogers <irogers@google.com>
>> Tested-by: Ravi Bangoria <ravi.bangoria@amd.com>
>> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
>> ---
>> tools/perf/arch/arm64/util/mem-events.c | 4 ++--
>> tools/perf/arch/arm64/util/mem-events.h | 7 +++++++
>> tools/perf/arch/arm64/util/pmu.c | 6 ++++++
>> tools/perf/arch/s390/util/pmu.c | 3 +++
>> tools/perf/arch/x86/util/mem-events.c | 4 ++--
>> tools/perf/arch/x86/util/mem-events.h | 9 +++++++++
>> tools/perf/arch/x86/util/pmu.c | 7 +++++++
>> tools/perf/util/mem-events.c | 2 +-
>> tools/perf/util/mem-events.h | 1 +
>> tools/perf/util/pmu.c | 4 +++-
>> tools/perf/util/pmu.h | 7 +++++++
>> 11 files changed, 48 insertions(+), 6 deletions(-)
>> create mode 100644 tools/perf/arch/arm64/util/mem-events.h
>> create mode 100644 tools/perf/arch/x86/util/mem-events.h
>>
>> diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm64/util/mem-events.c
>> index 3bcc5c7035c2..aaa4804922b4 100644
>> --- a/tools/perf/arch/arm64/util/mem-events.c
>> +++ b/tools/perf/arch/arm64/util/mem-events.c
>> @@ -4,7 +4,7 @@
>>
>> #define E(t, n, s) { .tag = t, .name = n, .sysfs_name = s }
>>
>> -static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
>> +struct perf_mem_event perf_mem_events_arm[PERF_MEM_EVENTS__MAX] = {
>> E("spe-load", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"),
>> E("spe-store", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"),
>> E("spe-ldst", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"),
>> @@ -17,7 +17,7 @@ struct perf_mem_event *perf_mem_events__ptr(int i)
>> if (i >= PERF_MEM_EVENTS__MAX)
>> return NULL;
>>
>> - return &perf_mem_events[i];
>> + return &perf_mem_events_arm[i];
>
> I recognized that it's hard code to "arm_spe_0", which might break if
> system registers different Arm SPE groups. But this is not the issue
> introduced by this patch, we might need to consider to fix it later.
>
>> }
>>
>> const char *perf_mem_events__name(int i, const char *pmu_name __maybe_unused)
>> diff --git a/tools/perf/arch/arm64/util/mem-events.h b/tools/perf/arch/arm64/util/mem-events.h
>> new file mode 100644
>> index 000000000000..5fc50be4be38
>> --- /dev/null
>> +++ b/tools/perf/arch/arm64/util/mem-events.h
>> @@ -0,0 +1,7 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +#ifndef _ARM64_MEM_EVENTS_H
>> +#define _ARM64_MEM_EVENTS_H
>> +
>> +extern struct perf_mem_event perf_mem_events_arm[PERF_MEM_EVENTS__MAX];
>> +
>> +#endif /* _ARM64_MEM_EVENTS_H */
>> diff --git a/tools/perf/arch/arm64/util/pmu.c b/tools/perf/arch/arm64/util/pmu.c
>> index 2a4eab2d160e..06ec9b838807 100644
>> --- a/tools/perf/arch/arm64/util/pmu.c
>> +++ b/tools/perf/arch/arm64/util/pmu.c
>> @@ -8,6 +8,12 @@
>> #include <api/fs/fs.h>
>> #include <math.h>
>>
>> +void perf_pmu__arch_init(struct perf_pmu *pmu)
>> +{
>> + if (!strcmp(pmu->name, "arm_spe_0"))
>> + pmu->mem_events = perf_mem_events_arm;
>
> This is not right and it should cause building failure on aarch64.
>
> aarch64 reuses aarch32's file arch/arm/util/pmu.c, and this file has
> already defined perf_pmu__arch_init(), you should add above change in
> the file arch/arm/util/pmu.c.
>

Sure.

> Now I cannot access a machine for testing Arm SPE, but I will play
> a bit for this patch set to ensure it can pass compilation. After
> that, I will seek Arm maintainers/reviewers help for the test.
>

Thanks. I guess I will hold the v3 until the test is done in case there
are other issues found in ARM.

Thanks,
Kan