Re: [PATCH v7 041/102] KVM: VMX: Introduce test mode related to EPT violation VE

Kai Huang
2022-07-20T05:13:17Z

On Tue, 2022-07-19 at 07:49 -0700, Isaku Yamahata wrote:
> On Fri, Jul 08, 2022 at 02:23:43PM +1200,
> Kai Huang <kai.huang@intel.com> wrote:
>
> > On Mon, 2022-06-27 at 14:53 -0700, isaku.yamahata@intel.com wrote:
> > > From: Isaku Yamahata <isaku.yamahata@intel.com>
> > >
> > > To support TDX, KVM is enhanced to operate with #VE. For TDX, KVM programs
> > > to inject #VE conditionally and set #VE suppress bit in EPT entry. For VMX
> > > case, #VE isn't used. If #VE happens for VMX, it's a bug. To be
> > > defensive (test that VMX case isn't broken), introduce option
> > > ept_violation_ve_test and when it's set, set error.
> >
> > I don't see why we need this patch. It may be helpful during your test, but why
> > do we need this patch for formal submission?
> >
> > And for a normal guest, what prevents one vcpu from sending #VE IPI to another
> > vcpu?
>
> Paolo suggested it as follows. Maybe it should be kernel config.
> (I forgot to add suggested-by. I'll add it)
>
> https://lore.kernel.org/lkml/84d56339-4a8a-6ddb-17cb-12074588ba9c@redhat.com/
>
> >

OK. But can we assume a normal guest won't sending #VE IPI?