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From: Reinette Chatre <reinette.chatre@intel.com>
To: Babu Moger <babu.moger@amd.com>, <tony.luck@intel.com>,
	<peternewman@google.com>
Cc: <corbet@lwn.net>, <tglx@linutronix.de>, <mingo@redhat.com>,
	<bp@alien8.de>, <dave.hansen@linux.intel.com>, <x86@kernel.org>,
	<hpa@zytor.com>, <paulmck@kernel.org>,
	<akpm@linux-foundation.org>, <thuth@redhat.com>,
	<rostedt@goodmis.org>, <ardb@kernel.org>,
	<gregkh@linuxfoundation.org>, <daniel.sneddon@linux.intel.com>,
	<jpoimboe@kernel.org>, <alexandre.chartre@oracle.com>,
	<pawan.kumar.gupta@linux.intel.com>, <thomas.lendacky@amd.com>,
	<perry.yuan@amd.com>, <seanjc@google.com>, <kai.huang@intel.com>,
	<xiaoyao.li@intel.com>, <kan.liang@linux.intel.com>,
	<xin3.li@intel.com>, <ebiggers@google.com>, <xin@zytor.com>,
	<sohil.mehta@intel.com>, <andrew.cooper3@citrix.com>,
	<mario.limonciello@amd.com>, <linux-doc@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <maciej.wieczor-retman@intel.com>,
	<eranian@google.com>
Subject: Re: [PATCH v12 17/26] x86/resctrl: Add the support for reading ABMC counters
Date: Fri, 11 Apr 2025 14:21:20 -0700	[thread overview]
Message-ID: <99e8d014-35c4-4bad-b1f7-a6f8eaee57a2@intel.com> (raw)
In-Reply-To: <0389f4beff82ded90aad4bd670210c56cf1f799e.1743725907.git.babu.moger@amd.com>

Hi Babu,

On 4/3/25 5:18 PM, Babu Moger wrote:
> Software can read the assignable counters using the QM_EVTSEL and QM_CTR
> register pair.
> 
> QM_EVTSEL Register definition:
> =======================================================
> Bits	Mnemonic	Description
> =======================================================
> 63:44	--		Reserved
> 43:32   RMID		Resource Monitoring Identifier
> 31	ExtEvtID	Extended Event Identifier
> 30:8	--		Reserved
> 7:0	EvtID		Event Identifier
> =======================================================
> 
> The contents of a specific counter can be read by setting the following
> fields in QM_EVTSEL.ExtendedEvtID = 1, QM_EVTSEL.EvtID = L3CacheABMC (=1)
> and setting [RMID] to the desired counter ID. Reading QM_CTR will then
> return the contents of the specified counter. The E bit will be set if the
> counter configuration was invalid, or if an invalid counter ID was set

Would an invalid counter configuration be possible at this point? I expect
that an invalid counter configuration would not allow the counter to be
configured in the first place.

> in the QM_EVTSEL[RMID] field.
> 
> Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/40332.pdf
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> ---
> v12: New patch to support extended event mode when ABMC is enabled.
> ---
>  arch/x86/kernel/cpu/resctrl/ctrlmondata.c |  4 +-
>  arch/x86/kernel/cpu/resctrl/internal.h    |  7 +++
>  arch/x86/kernel/cpu/resctrl/monitor.c     | 69 ++++++++++++++++-------
>  include/linux/resctrl.h                   |  9 +--
>  4 files changed, 63 insertions(+), 26 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> index 2225c40b8888..da78389c6ac7 100644
> --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> @@ -636,6 +636,7 @@ void mon_event_read(struct rmid_read *rr, struct rdt_resource *r,
>  	rr->r = r;
>  	rr->d = d;
>  	rr->first = first;
> +	rr->cntr_id = mbm_cntr_get(r, d, rdtgrp, evtid);
>  	rr->arch_mon_ctx = resctrl_arch_mon_ctx_alloc(r, evtid);
>  	if (IS_ERR(rr->arch_mon_ctx)) {
>  		rr->err = -EINVAL;
> @@ -661,13 +662,14 @@ void mon_event_read(struct rmid_read *rr, struct rdt_resource *r,
>  int rdtgroup_mondata_show(struct seq_file *m, void *arg)
>  {
>  	struct kernfs_open_file *of = m->private;
> +	enum resctrl_event_id evtid;
>  	struct rdt_domain_hdr *hdr;
>  	struct rmid_read rr = {0};
>  	struct rdt_mon_domain *d;
> -	u32 resid, evtid, domid;
>  	struct rdtgroup *rdtgrp;
>  	struct rdt_resource *r;
>  	union mon_data_bits md;
> +	u32 resid, domid;
>  	int ret = 0;
>  

Why make this change?

>  	rdtgrp = rdtgroup_kn_lock_live(of->kn);
> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
> index fbb045aec7e5..b7d1a59f09f8 100644
> --- a/arch/x86/kernel/cpu/resctrl/internal.h
> +++ b/arch/x86/kernel/cpu/resctrl/internal.h
> @@ -38,6 +38,12 @@
>  /* Setting bit 0 in L3_QOS_EXT_CFG enables the ABMC feature. */
>  #define ABMC_ENABLE_BIT			0
>  
> +/*
> + * ABMC Qos Event Identifiers.
> + */
> +#define ABMC_EXTENDED_EVT_ID		BIT(31)
> +#define ABMC_EVT_ID			1
> +
>  /**
>   * cpumask_any_housekeeping() - Choose any CPU in @mask, preferring those that
>   *			        aren't marked nohz_full
> @@ -156,6 +162,7 @@ struct rmid_read {
>  	struct rdt_mon_domain	*d;
>  	enum resctrl_event_id	evtid;
>  	bool			first;
> +	int			cntr_id;
>  	struct cacheinfo	*ci;
>  	int			err;
>  	u64			val;

This does not look necessary (more below)

> diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c
> index 5e7970fd0a97..58476c065921 100644
> --- a/arch/x86/kernel/cpu/resctrl/monitor.c
> +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
> @@ -269,8 +269,8 @@ static struct arch_mbm_state *get_arch_mbm_state(struct rdt_hw_mon_domain *hw_do
>  }
>  
>  void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain *d,
> -			     u32 unused, u32 rmid,
> -			     enum resctrl_event_id eventid)
> +			     u32 unused, u32 rmid, enum resctrl_event_id eventid,
> +			     int cntr_id)
>  {
>  	struct rdt_hw_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d);
>  	int cpu = cpumask_any(&d->hdr.cpu_mask);
> @@ -281,7 +281,15 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain *d,
>  	if (am) {
>  		memset(am, 0, sizeof(*am));
>  
> -		prmid = logical_rmid_to_physical_rmid(cpu, rmid);
> +		if (resctrl_arch_mbm_cntr_assign_enabled(r) &&
> +		    resctrl_is_mbm_event(eventid)) {
> +			if (cntr_id < 0)
> +				return;
> +			prmid = cntr_id;
> +			eventid = ABMC_EXTENDED_EVT_ID | ABMC_EVT_ID;

hmmm ... this is not a valid enum resctrl_event_id.

(before venturing into alternatives we need to study Tony's new RMID series
because he made some changes to the enum that may support this work)


> +		} else {
> +			prmid = logical_rmid_to_physical_rmid(cpu, rmid);
> +		}
>  		/* Record any initial, non-zero count value. */
>  		__rmid_read_phys(prmid, eventid, &am->prev_msr);
>  	}
> @@ -313,12 +321,13 @@ static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int width)
>  }
>  
>  int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
> -			   u32 unused, u32 rmid, enum resctrl_event_id eventid,
> -			   u64 *val, void *ignored)
> +			   u32 unused, u32 rmid, int cntr_id,
> +			   enum resctrl_event_id eventid, u64 *val, void *ignored)
>  {
>  	struct rdt_hw_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d);
>  	struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
>  	int cpu = cpumask_any(&d->hdr.cpu_mask);
> +	enum resctrl_event_id peventid;
>  	struct arch_mbm_state *am;
>  	u64 msr_val, chunks;
>  	u32 prmid;
> @@ -326,8 +335,19 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
>  
>  	resctrl_arch_rmid_read_context_check();
>  
> -	prmid = logical_rmid_to_physical_rmid(cpu, rmid);
> -	ret = __rmid_read_phys(prmid, eventid, &msr_val);
> +	if (resctrl_arch_mbm_cntr_assign_enabled(r) &&
> +	    resctrl_is_mbm_event(eventid)) {
> +		if (cntr_id < 0)
> +			return cntr_id;
> +
> +		prmid = cntr_id;
> +		peventid = ABMC_EXTENDED_EVT_ID | ABMC_EVT_ID;

same

> +	} else {
> +		prmid = logical_rmid_to_physical_rmid(cpu, rmid);
> +		peventid = eventid;
> +	}
> +
> +	ret = __rmid_read_phys(prmid, peventid, &msr_val);
>  	if (ret)
>  		return ret;
>  
> @@ -392,7 +412,7 @@ void __check_limbo(struct rdt_mon_domain *d, bool force_free)
>  			break;
>  
>  		entry = __rmid_entry(idx);
> -		if (resctrl_arch_rmid_read(r, d, entry->closid, entry->rmid,
> +		if (resctrl_arch_rmid_read(r, d, entry->closid, entry->rmid, -1,
>  					   QOS_L3_OCCUP_EVENT_ID, &val,
>  					   arch_mon_ctx)) {
>  			rmid_dirty = true;
> @@ -599,7 +619,7 @@ static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
>  	u64 tval = 0;
>  
>  	if (rr->first) {
> -		resctrl_arch_reset_rmid(rr->r, rr->d, closid, rmid, rr->evtid);
> +		resctrl_arch_reset_rmid(rr->r, rr->d, closid, rmid, rr->evtid, rr->cntr_id);
>  		m = get_mbm_state(rr->d, closid, rmid, rr->evtid);
>  		if (m)
>  			memset(m, 0, sizeof(struct mbm_state));
> @@ -610,7 +630,7 @@ static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
>  		/* Reading a single domain, must be on a CPU in that domain. */
>  		if (!cpumask_test_cpu(cpu, &rr->d->hdr.cpu_mask))
>  			return -EINVAL;
> -		rr->err = resctrl_arch_rmid_read(rr->r, rr->d, closid, rmid,
> +		rr->err = resctrl_arch_rmid_read(rr->r, rr->d, closid, rmid, rr->cntr_id,
>  						 rr->evtid, &tval, rr->arch_mon_ctx);
>  		if (rr->err)
>  			return rr->err;
> @@ -635,7 +655,7 @@ static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
>  	list_for_each_entry(d, &rr->r->mon_domains, hdr.list) {
>  		if (d->ci->id != rr->ci->id)
>  			continue;
> -		err = resctrl_arch_rmid_read(rr->r, d, closid, rmid,
> +		err = resctrl_arch_rmid_read(rr->r, d, closid, rmid, rr->cntr_id,
>  					     rr->evtid, &tval, rr->arch_mon_ctx);
>  		if (!err) {
>  			rr->val += tval;
> @@ -703,8 +723,8 @@ void mon_event_count(void *info)
>  
>  	if (rdtgrp->type == RDTCTRL_GROUP) {
>  		list_for_each_entry(entry, head, mon.crdtgrp_list) {
> -			if (__mon_event_count(entry->closid, entry->mon.rmid,
> -					      rr) == 0)
> +			rr->cntr_id = mbm_cntr_get(rr->r, rr->d, entry, rr->evtid);
> +			if (__mon_event_count(entry->closid, entry->mon.rmid, rr) == 0)
>  				ret = 0;
>  		}
>  	}
> @@ -835,13 +855,15 @@ static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_mon_domain *dom_mbm)
>  }
>  
>  static void mbm_update_one_event(struct rdt_resource *r, struct rdt_mon_domain *d,
> -				 u32 closid, u32 rmid, enum resctrl_event_id evtid)
> +				 u32 closid, u32 rmid, int cntr_id,
> +				 enum resctrl_event_id evtid)

Would it not be simpler to provide resource group as argument (remove closid, rmid, and
cntr_id) and determine cntr_id from known data to provide cntr_id as argument to
__mon_event_count(), removing the need for a new member in struct rmid_read?

>  {
>  	struct rmid_read rr = {0};
>  
>  	rr.r = r;
>  	rr.d = d;
>  	rr.evtid = evtid;
> +	rr.cntr_id = cntr_id;
>  	rr.arch_mon_ctx = resctrl_arch_mon_ctx_alloc(rr.r, rr.evtid);
>  	if (IS_ERR(rr.arch_mon_ctx)) {
>  		pr_warn_ratelimited("Failed to allocate monitor context: %ld",
> @@ -862,17 +884,22 @@ static void mbm_update_one_event(struct rdt_resource *r, struct rdt_mon_domain *
>  }
>  
>  static void mbm_update(struct rdt_resource *r, struct rdt_mon_domain *d,
> -		       u32 closid, u32 rmid)
> +		       struct rdtgroup *rdtgrp, u32 closid, u32 rmid)

This looks redundant to provide both the resource group and two of its members as parameters.
Looks like this can just be resource group and then remove closid and rmid?

>  {
> +	int cntr_id;
>  	/*
>  	 * This is protected from concurrent reads from user as both
>  	 * the user and overflow handler hold the global mutex.
>  	 */
> -	if (resctrl_arch_is_mbm_total_enabled())
> -		mbm_update_one_event(r, d, closid, rmid, QOS_L3_MBM_TOTAL_EVENT_ID);
> +	if (resctrl_arch_is_mbm_total_enabled()) {
> +		cntr_id = mbm_cntr_get(r, d, rdtgrp, QOS_L3_MBM_TOTAL_EVENT_ID);
> +		mbm_update_one_event(r, d, closid, rmid, cntr_id, QOS_L3_MBM_TOTAL_EVENT_ID);

With similar change to mbm_update_one_event() where it takes resource group as parameter
it is not needed to compute counter ID here.

This patch could be split. One patch can replace the closid/rmid in mbm_update()
and mbm_update_one_event() with the resource group. Following patches can build on that.

> +	}
>  
> -	if (resctrl_arch_is_mbm_local_enabled())
> -		mbm_update_one_event(r, d, closid, rmid, QOS_L3_MBM_LOCAL_EVENT_ID);
> +	if (resctrl_arch_is_mbm_local_enabled()) {
> +		cntr_id = mbm_cntr_get(r, d, rdtgrp, QOS_L3_MBM_LOCAL_EVENT_ID);
> +		mbm_update_one_event(r, d, closid, rmid, cntr_id, QOS_L3_MBM_LOCAL_EVENT_ID);
> +	}
>  }
>  
>  /*
> @@ -945,11 +972,11 @@ void mbm_handle_overflow(struct work_struct *work)
>  	d = container_of(work, struct rdt_mon_domain, mbm_over.work);
>  
>  	list_for_each_entry(prgrp, &rdt_all_groups, rdtgroup_list) {
> -		mbm_update(r, d, prgrp->closid, prgrp->mon.rmid);
> +		mbm_update(r, d, prgrp, prgrp->closid, prgrp->mon.rmid);

providing both the resource group and two of its members really looks
redundant.

>  
>  		head = &prgrp->mon.crdtgrp_list;
>  		list_for_each_entry(crgrp, head, mon.crdtgrp_list)
> -			mbm_update(r, d, crgrp->closid, crgrp->mon.rmid);
> +			mbm_update(r, d, crgrp, crgrp->closid, crgrp->mon.rmid);

same

>  
>  		if (is_mba_sc(NULL))
>  			update_mba_bw(prgrp, d);
> diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
> index 60270606f1b8..107cb14a0db2 100644
> --- a/include/linux/resctrl.h
> +++ b/include/linux/resctrl.h
> @@ -466,8 +466,9 @@ void resctrl_offline_cpu(unsigned int cpu);
>   * 0 on success, or -EIO, -EINVAL etc on error.
>   */
>  int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
> -			   u32 closid, u32 rmid, enum resctrl_event_id eventid,
> -			   u64 *val, void *arch_mon_ctx);
> +			   u32 closid, u32 rmid, int cntr_id,
> +			   enum resctrl_event_id eventid, u64 *val,
> +			   void *arch_mon_ctx);
>  
>  /**
>   * resctrl_arch_rmid_read_context_check()  - warn about invalid contexts
> @@ -513,8 +514,8 @@ struct rdt_domain_hdr *resctrl_find_domain(struct list_head *h, int id,
>   * This can be called from any CPU.
>   */
>  void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain *d,
> -			     u32 closid, u32 rmid,
> -			     enum resctrl_event_id eventid);
> +			     u32 closid, u32 rmid, enum resctrl_event_id eventid,
> +			     int cntr_id);
>  
>  /**
>   * resctrl_arch_reset_rmid_all() - Reset all private state associated with

When changing the interface the associated kernel doc should also be updated.

Reinette


  reply	other threads:[~2025-04-11 21:22 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-04  0:18 [PATCH v12 00/26] x86/resctrl : Support AMD Assignable Bandwidth Monitoring Counters (ABMC) Babu Moger
2025-04-04  0:18 ` [PATCH v12 01/26] x86/resctrl: Introduce mbm_total_cfg and mbm_local_cfg in struct rdt_hw_mon_domain Babu Moger
2025-04-11 20:49   ` Reinette Chatre
2025-04-14 15:56     ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 02/26] x86/resctrl: Remove MSR reading of event configuration value Babu Moger
2025-04-11 20:50   ` Reinette Chatre
2025-04-14 15:57     ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 03/26] x86/cpufeatures: Add support for Assignable Bandwidth Monitoring Counters (ABMC) Babu Moger
2025-04-11 20:52   ` Reinette Chatre
2025-04-14 17:48     ` Moger, Babu
2025-04-15 16:09       ` Reinette Chatre
2025-04-15 19:43         ` Moger, Babu
2025-04-16 16:08           ` Reinette Chatre
2025-04-17 14:27             ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 04/26] x86/resctrl: Add ABMC feature in the command line options Babu Moger
2025-04-04  0:18 ` [PATCH v12 05/26] x86/resctrl: Consolidate monitoring related data from rdt_resource Babu Moger
2025-04-04  0:18 ` [PATCH v12 06/26] x86/resctrl: Detect Assignable Bandwidth Monitoring feature details Babu Moger
2025-04-04  0:18 ` [PATCH v12 07/26] x86/resctrl: Add support to enable/disable AMD ABMC feature Babu Moger
2025-04-04  0:18 ` [PATCH v12 08/26] x86/resctrl: Introduce the interface to display monitor mode Babu Moger
2025-04-11 20:56   ` Reinette Chatre
2025-04-14 19:52     ` Moger, Babu
2025-04-15 16:22       ` Reinette Chatre
2025-04-16 14:05         ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 09/26] x86/resctrl: Introduce interface to display number of monitoring counters Babu Moger
2025-04-11 21:01   ` Reinette Chatre
2025-04-14 20:12     ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 10/26] x86/resctrl: Introduce mbm_cntr_cfg to track assignable counters at domain Babu Moger
2025-04-04  0:18 ` [PATCH v12 11/26] x86/resctrl: Introduce interface to display number of free MBM counters Babu Moger
2025-04-04  0:18 ` [PATCH v12 12/26] x86/resctrl: Add data structures and definitions for ABMC assignment Babu Moger
2025-04-11 21:01   ` Reinette Chatre
2025-04-14 20:30     ` Moger, Babu
2025-04-15 16:30       ` Reinette Chatre
2025-04-16 15:43         ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 13/26] x86/resctrl: Implement resctrl_arch_config_cntr() to assign a counter with ABMC Babu Moger
2025-04-11 21:02   ` Reinette Chatre
2025-04-14 20:51     ` Moger, Babu
2025-04-15 16:38       ` Reinette Chatre
2025-04-16 15:51         ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 14/26] x86/resctrl: Add the functionality to assign MBM events Babu Moger
2025-04-11 21:04   ` Reinette Chatre
2025-04-15 14:20     ` Moger, Babu
2025-04-15 16:53       ` Reinette Chatre
2025-04-16 17:09         ` Moger, Babu
2025-04-16 17:55           ` Luck, Tony
2025-04-16 18:17             ` Moger, Babu
2025-04-16 19:02           ` Reinette Chatre
2025-04-16 19:29             ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 15/26] x86/resctrl: Add the functionality to unassign " Babu Moger
2025-04-04  0:18 ` [PATCH v12 16/26] x86/resctrl: Report 'Unassigned' for MBM events in mbm_cntr_assign mode Babu Moger
2025-04-11 21:08   ` Reinette Chatre
2025-04-15 15:00     ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 17/26] x86/resctrl: Add the support for reading ABMC counters Babu Moger
2025-04-11 21:21   ` Reinette Chatre [this message]
2025-04-15 16:41     ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 18/26] x86/resctrl: Add default MBM event configurations for mbm_cntr_assign mode Babu Moger
2025-04-11 21:44   ` Reinette Chatre
2025-04-15 18:48     ` Moger, Babu
2025-04-15 19:25       ` Luck, Tony
2025-04-16 16:21         ` Reinette Chatre
2025-04-16 17:26           ` Moger, Babu
2025-04-16 16:18       ` Reinette Chatre
2025-04-16 17:27         ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 19/26] x86/resctrl: Add event configuration directory under info/L3_MON/ Babu Moger
2025-04-11 22:04   ` Reinette Chatre
2025-04-15 20:29     ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 20/26] x86/resctrl: Provide interface to update the event configurations Babu Moger
2025-04-11 22:07   ` Reinette Chatre
2025-04-15 20:37     ` Moger, Babu
2025-04-16 18:52       ` Reinette Chatre
2025-04-17 14:34         ` Moger, Babu
2025-04-17 15:09           ` Reinette Chatre
2025-04-17 20:19             ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 21/26] x86/resctrl: Introduce mbm_assign_on_mkdir to configure assignments Babu Moger
2025-04-11 22:08   ` Reinette Chatre
2025-04-15 20:39     ` Moger, Babu
2025-04-04  0:18 ` [PATCH v12 22/26] x86/resctrl: Auto assign/unassign counters when mbm_cntr_assign is enabled Babu Moger
2025-04-04  0:18 ` [PATCH v12 23/26] x86/resctrl: Introduce mbm_L3_assignments to list assignments in a group Babu Moger
2025-04-04  0:18 ` [PATCH v12 24/26] x86/resctrl: Introduce the interface to modify " Babu Moger
2025-04-04  0:18 ` [PATCH v12 25/26] x86/resctrl: Introduce the interface to switch between monitor modes Babu Moger
2025-04-04  0:18 ` [PATCH v12 26/26] x86/resctrl: Configure mbm_cntr_assign mode if supported Babu Moger

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