From: Paul Cercueil <paul@opendingux.net>
To: 周琰杰 <zhouyanjie@wanyeetech.com>
Cc: tsbogend@alpha.franken.de, robh+dt@kernel.org,
linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com,
aric.pzqi@ingenic.com, rick.tyliu@ingenic.com,
sihui.liu@ingenic.com, jun.jiang@ingenic.com,
sernia.zhou@foxmail.com
Subject: Re: [PATCH 3/4] MIPS: GCW0: Adjust pinctrl related code in device tree.
Date: Tue, 22 Jun 2021 13:46:57 +0100 [thread overview]
Message-ID: <9US3VQ.SK89X0OFZC2Z2@opendingux.net> (raw)
In-Reply-To: <1624347445-88070-4-git-send-email-zhouyanjie@wanyeetech.com>
Hi Zhou,
Le mar., juin 22 2021 at 15:37:24 +0800, 周琰杰 (Zhou Yanjie)
<zhouyanjie@wanyeetech.com> a écrit :
> Change the "lcd-24bit" in the pinctrl groups to "lcd-8bit",
> "lcd-16bit", "lcd-18bit", "lcd-24bit", since the pinctrl
> driver has done the necessary splitting of the lcd group,
> and it is convenient to further streamline the lcd-24bit
> group in the subsequent pinctrl driver.
>
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
> ---
> arch/mips/boot/dts/ingenic/gcw0.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/boot/dts/ingenic/gcw0.dts
> b/arch/mips/boot/dts/ingenic/gcw0.dts
> index f4c04f2..dec3ba6f 100644
> --- a/arch/mips/boot/dts/ingenic/gcw0.dts
> +++ b/arch/mips/boot/dts/ingenic/gcw0.dts
> @@ -393,7 +393,7 @@
> &pinctrl {
> pins_lcd: lcd {
> function = "lcd";
> - groups = "lcd-24bit";
> + groups = "lcd-8bit", "lcd-16bit", "lcd-18bit", "lcd-24bit";
No, I'm pretty sure this won't work, since "lcd-24bit" contains pins
that are also contained by the other groups.
-Paul
> };
>
> pins_uart2: uart2 {
> --
> 2.7.4
>
next prev parent reply other threads:[~2021-06-22 12:47 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-22 7:37 [PATCH 0/4] Misc Ingenic patches 周琰杰 (Zhou Yanjie)
2021-06-22 7:37 ` [PATCH 1/4] MIPS: X1830: Respect cell count of common properties 周琰杰 (Zhou Yanjie)
2021-06-22 12:30 ` Paul Cercueil
2021-06-22 7:37 ` [PATCH 2/4] MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-06-22 12:31 ` Paul Cercueil
2021-06-22 7:37 ` [PATCH 3/4] MIPS: GCW0: Adjust pinctrl related code in device tree 周琰杰 (Zhou Yanjie)
2021-06-22 12:46 ` Paul Cercueil [this message]
2021-06-22 13:51 ` 周琰杰
2021-06-22 14:05 ` Paul Cercueil
2021-06-22 14:41 ` 周琰杰
2021-06-22 7:37 ` [PATCH 4/4] MIPS: CI20: Reduce MSC0 frequency and add second percpu timer for SMP 周琰杰 (Zhou Yanjie)
2021-06-22 12:39 ` Paul Cercueil
2021-06-22 13:55 ` 周琰杰
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9US3VQ.SK89X0OFZC2Z2@opendingux.net \
--to=paul@opendingux.net \
--cc=aric.pzqi@ingenic.com \
--cc=devicetree@vger.kernel.org \
--cc=dongsheng.qiu@ingenic.com \
--cc=jun.jiang@ingenic.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=rick.tyliu@ingenic.com \
--cc=robh+dt@kernel.org \
--cc=sernia.zhou@foxmail.com \
--cc=sihui.liu@ingenic.com \
--cc=tsbogend@alpha.franken.de \
--cc=zhouyanjie@wanyeetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox