Re: [PATCH 2/2] perf/x86/amd/lbr: adjust LBR regardless of filtering

[Sandipan Das <sandipan.das@amd.com>]

On 9/29/2022 12:10 AM, Stephane Eranian wrote:
> In case of fused compare and taken branch instructions, the AMD LBR points to
> the compare instruction instead of the branch. Users of LBR usually expects
> the from address to point to a branch instruction. The kernel has code to
> adjust the from address via get_branch_type_fused(). However this correction
> is only applied when a branch filter is applied. That means that if no
> filter is present, the quality of the data is lower.
> 
> Fix the problem by applying the adjustment regardless of the filter setting,
> bringing the AMD LBR to the same level as other LBR implementations.
> 
> Signed-off-by: Stephane Eranian <eranian@google.com>
> ---
>  arch/x86/events/amd/lbr.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/events/amd/lbr.c b/arch/x86/events/amd/lbr.c
> index 2e1c1573efe7..38a75216c12c 100644
> --- a/arch/x86/events/amd/lbr.c
> +++ b/arch/x86/events/amd/lbr.c
> @@ -99,12 +99,13 @@ static void amd_pmu_lbr_filter(void)
>  	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>  	int br_sel = cpuc->br_sel, offset, type, i, j;
>  	bool compress = false;
> +	bool fused_only = false;
>  	u64 from, to;
>  
>  	/* If sampling all branches, there is nothing to filter */
>  	if (((br_sel & X86_BR_ALL) == X86_BR_ALL) &&
>  	    ((br_sel & X86_BR_TYPE_SAVE) != X86_BR_TYPE_SAVE))
> -		return;
> +		fused_only = true;
>  
>  	for (i = 0; i < cpuc->lbr_stack.nr; i++) {
>  		from = cpuc->lbr_entries[i].from;
> @@ -116,8 +117,11 @@ static void amd_pmu_lbr_filter(void)
>  		 * fusion where it points to an instruction preceding the
>  		 * actual branch
>  		 */
> -		if (offset)
> +		if (offset) {
>  			cpuc->lbr_entries[i].from += offset;
> +			if (fused_only)
> +				continue;
> +		}
>  
>  		/* If type does not correspond, then discard */
>  		if (type == X86_BR_NONE || (br_sel & type) != type) {

Reviewed-by: Sandipan Das <sandipan.das@amd.com>