From: Harry Wentland <harry.wentland@amd.com>
To: Matthew Schwartz <matthew.schwartz@linux.dev>,
amd-gfx@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org, mario.limonciello@amd.com,
alexander.deucher@amd.com, alex.hung@amd.com,
daniel.wheeler@amd.com, roman.li@amd.com, misyl@froggi.es
Subject: Re: [PATCH] drm/amd/display: Don't program BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled on DCN30
Date: Tue, 21 Oct 2025 13:43:20 -0400 [thread overview]
Message-ID: <9c8d21f2-5d6d-4b70-9eee-0bbd10b984b2@amd.com> (raw)
In-Reply-To: <20251020230934.387745-1-matthew.schwartz@linux.dev>
On 2025-10-20 19:09, Matthew Schwartz wrote:
> Before commit 33056a97ae5e ("drm/amd/display: Remove double checks for
> `debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
> checked the low-power debug flag before calling
> dpp3_power_on_blnd_lut(false).
>
> After commit 33056a97ae5e ("drm/amd/display: Remove double checks for
> `debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
> unconditionally calls dpp3_power_on_blnd_lut(false). The BLNDGAM power
> helper writes BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled, causing
> immediate SRAM power toggles instead of deferring at vupdate. This can
> disrupt atomic color/LUT sequencing during transitions between
> direct scanout and composition within gamescope's DRM backend on
> Steam Deck OLED.
>
> To fix this, leave the BLNDGAM power state unchanged when low-power is
> disabled, matching dpp3_power_on_hdr3dlut and dpp3_power_on_shaper.
>
> Fixes: 33056a97ae5e ("drm/amd/display: Remove double checks for `debug.enable_mem_low_power.bits.cm`")
> Signed-off-by: Matthew Schwartz <matthew.schwartz@linux.dev>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Harry
> ---
> drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> index 09be2a90cc79d..4f569cd8a5d61 100644
> --- a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> @@ -578,9 +578,6 @@ static void dpp3_power_on_blnd_lut(
> dpp_base->ctx->dc->optimized_required = true;
> dpp_base->deferred_reg_writes.bits.disable_blnd_lut = true;
> }
> - } else {
> - REG_SET(CM_MEM_PWR_CTRL, 0,
> - BLNDGAM_MEM_PWR_FORCE, power_on == true ? 0 : 1);
> }
> }
>
prev parent reply other threads:[~2025-10-21 17:44 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 23:09 [PATCH] drm/amd/display: Don't program BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled on DCN30 Matthew Schwartz
2025-10-21 16:21 ` Mario Limonciello
2025-10-21 17:43 ` Harry Wentland [this message]
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