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From: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
To: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, anshuman.khandual@arm.com,
	david@redhat.com, Mike Rapoport <rppt@linux.ibm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Suren Baghdasaryan <surenb@google.com>
Subject: Re: [PATCH 1/1] arm64: reduce section size for sparsemem
Date: Wed, 20 Jan 2021 10:47:37 -0800	[thread overview]
Message-ID: <9e23428b537611b3fd24eed75b9a81f0@codeaurora.org> (raw)
In-Reply-To: <20210120174933.GA20981@willie-the-truck>

On 2021-01-20 09:49, Will Deacon wrote:
> On Fri, Jan 08, 2021 at 03:16:00PM -0800, Sudarshan Rajagopalan wrote:
>> Reducing the section size helps reduce wastage of reserved memory
>> for huge memory holes in sparsemem model. But having a much smaller
>> section size bits could break PMD mappings for vmemmap and wouldn't
>> accomodate the highest order page for certain page size granule 
>> configs.
>> It is determined that SECTION_SIZE_BITS of 27 (128MB) could be ideal
>> default value for 4K_PAGES that gives least section size without 
>> breaking
>> PMD based vmemmap mappings. For simplicity, 16K_PAGES could follow the
>> same as 4K_PAGES. And the least SECTION_SIZE_BITS for 64K_PAGES is 29
>> that could accomodate MAX_ORDER.
>> 
>> Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
>> Suggested-by: David Hildenbrand <david@redhat.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Anshuman Khandual <anshuman.khandual@arm.com>
>> Cc: Mike Rapoport <rppt@linux.ibm.com>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: Suren Baghdasaryan <surenb@google.com>
>> ---
>>  arch/arm64/include/asm/sparsemem.h | 10 ++++++++--
>>  1 file changed, 8 insertions(+), 2 deletions(-)
>> 
>> diff --git a/arch/arm64/include/asm/sparsemem.h 
>> b/arch/arm64/include/asm/sparsemem.h
>> index 1f43fcc79738..ff08ff6b677c 100644
>> --- a/arch/arm64/include/asm/sparsemem.h
>> +++ b/arch/arm64/include/asm/sparsemem.h
>> @@ -7,7 +7,13 @@
>> 
>>  #ifdef CONFIG_SPARSEMEM
>>  #define MAX_PHYSMEM_BITS	CONFIG_ARM64_PA_BITS
>> -#define SECTION_SIZE_BITS	30
>> -#endif
>> +
>> +#if defined(CONFIG_ARM64_4K_PAGES) || defined(CONFIG_ARM64_16K_PAGES)
>> +#define SECTION_SIZE_BITS 27
>> +#else
>> +#define SECTION_SIZE_BITS 29
>> +#endif /* CONFIG_ARM64_4K_PAGES || CONFIG_ARM64_16K_PAGES */
>> +
>> +#endif /* CONFIG_SPARSEMEM*/
> 
> Please can you repost this in light of the comments from Anshuman?
> 
> Thanks,
> 
> Will

Sure Will. We were held up with some other critical tasks.. will repost 
the patch by EOD after addressing Anshuman's comments.

-- 
Sudarshan

--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a 
Linux Foundation Collaborative Project

      reply	other threads:[~2021-01-20 19:23 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-08 23:15 [PATCH 0/1] arm64: reduce section size for sparsemem Sudarshan Rajagopalan
2021-01-08 23:16 ` [PATCH 1/1] " Sudarshan Rajagopalan
2021-01-11 11:09   ` Anshuman Khandual
2021-01-21  5:35     ` Sudarshan Rajagopalan
2021-01-20 17:49   ` Will Deacon
2021-01-20 18:47     ` Sudarshan Rajagopalan [this message]

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