From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FFBCC433DB for ; Wed, 20 Jan 2021 19:23:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01CAD233FE for ; Wed, 20 Jan 2021 19:23:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732996AbhATTXZ (ORCPT ); Wed, 20 Jan 2021 14:23:25 -0500 Received: from m42-8.mailgun.net ([69.72.42.8]:61785 "EHLO m42-8.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732407AbhATSsg (ORCPT ); Wed, 20 Jan 2021 13:48:36 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1611168490; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=3yGkJ8CECe99IYKCJvAG5sDtoQE2c9Ju5uVXlzxmMEQ=; b=plV5WydLOgfFAJAYugwW7cTswVvChrCcNP3iDWNwDUUxDlD+bekd+NX5PXj7YE3FAfU6oqDi PgI/K0119geZD10DA/x9pNPGDFirciDuApEImqzy24wX7aMKlTc+heZixfHKxvRiHoq1fuTL FR9CXNfdmOxYp1rXVN9RP98XHaU= X-Mailgun-Sending-Ip: 69.72.42.8 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-east-1.postgun.com with SMTP id 60087acb2c36b2106d6d7cdd (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 20 Jan 2021 18:47:39 GMT Sender: sudaraja=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id F3077C43465; Wed, 20 Jan 2021 18:47:38 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sudaraja) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0E30FC433C6; Wed, 20 Jan 2021 18:47:37 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 20 Jan 2021 10:47:37 -0800 From: Sudarshan Rajagopalan To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, anshuman.khandual@arm.com, david@redhat.com, Mike Rapoport , Mark Rutland , Suren Baghdasaryan Subject: Re: [PATCH 1/1] arm64: reduce section size for sparsemem In-Reply-To: <20210120174933.GA20981@willie-the-truck> References: <15cf9a2359197fee0168f820c5c904650d07939e.1610146597.git.sudaraja@codeaurora.org> <20210120174933.GA20981@willie-the-truck> Message-ID: <9e23428b537611b3fd24eed75b9a81f0@codeaurora.org> X-Sender: sudaraja@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-01-20 09:49, Will Deacon wrote: > On Fri, Jan 08, 2021 at 03:16:00PM -0800, Sudarshan Rajagopalan wrote: >> Reducing the section size helps reduce wastage of reserved memory >> for huge memory holes in sparsemem model. But having a much smaller >> section size bits could break PMD mappings for vmemmap and wouldn't >> accomodate the highest order page for certain page size granule >> configs. >> It is determined that SECTION_SIZE_BITS of 27 (128MB) could be ideal >> default value for 4K_PAGES that gives least section size without >> breaking >> PMD based vmemmap mappings. For simplicity, 16K_PAGES could follow the >> same as 4K_PAGES. And the least SECTION_SIZE_BITS for 64K_PAGES is 29 >> that could accomodate MAX_ORDER. >> >> Signed-off-by: Sudarshan Rajagopalan >> Suggested-by: David Hildenbrand >> Cc: Will Deacon >> Cc: Anshuman Khandual >> Cc: Mike Rapoport >> Cc: Mark Rutland >> Cc: Suren Baghdasaryan >> --- >> arch/arm64/include/asm/sparsemem.h | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/include/asm/sparsemem.h >> b/arch/arm64/include/asm/sparsemem.h >> index 1f43fcc79738..ff08ff6b677c 100644 >> --- a/arch/arm64/include/asm/sparsemem.h >> +++ b/arch/arm64/include/asm/sparsemem.h >> @@ -7,7 +7,13 @@ >> >> #ifdef CONFIG_SPARSEMEM >> #define MAX_PHYSMEM_BITS CONFIG_ARM64_PA_BITS >> -#define SECTION_SIZE_BITS 30 >> -#endif >> + >> +#if defined(CONFIG_ARM64_4K_PAGES) || defined(CONFIG_ARM64_16K_PAGES) >> +#define SECTION_SIZE_BITS 27 >> +#else >> +#define SECTION_SIZE_BITS 29 >> +#endif /* CONFIG_ARM64_4K_PAGES || CONFIG_ARM64_16K_PAGES */ >> + >> +#endif /* CONFIG_SPARSEMEM*/ > > Please can you repost this in light of the comments from Anshuman? > > Thanks, > > Will Sure Will. We were held up with some other critical tasks.. will repost the patch by EOD after addressing Anshuman's comments. -- Sudarshan -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project