Re: [PATCH] PCI updates - 32-bit IO support

["H. Peter Anvin" <hpa@zytor.com>]

Followup to:  <20011218235024.N13126@flint.arm.linux.org.uk>
By author:    Russell King <rmk@flint.arm.linux.org.uk>
In newsgroup: linux.dev.kernel
>
> I have here a system which requires 32-bit IO addressing on its PCI
> busses.  Currently, Linux zeros the upper IO base/limit registers on
> all PCI bridges, which prevents addresses being forwarded on this
> system.
> 
> The following patch the upper IO base/limit registers to be set
> appropriately by the PCI layer.
> 
> This patch is being sent for review, and is targetted solely at 2.5.
> 
> diff -ur orig/drivers/pci/setup-bus.c linux/drivers/pci/setup-bus.c
> --- orig/drivers/pci/setup-bus.c	Sun Oct 14 20:53:14 2001
> +++ linux/drivers/pci/setup-bus.c	Tue Dec 18 23:20:13 2001
> @@ -148,7 +181,10 @@
>  	pci_write_config_dword(bridge, PCI_IO_BASE, l);
>  
>  	/* Clear upper 16 bits of I/O base/limit. */
> -	pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0);
> +	pci_write_config_word(bridge, PCI_IO_BASE_UPPER16,
> +			ranges.io_start >> 16);
> +	pci_write_config_word(bridge, PCI_IO_LIMIT_UPPER16,
> +			ranges.io_end >> 16);
>  

You probably need to verify that 32-bit support is available (both on
the bridge and the peripherals), but if they are, there's no reason
not to use it on non-x86 architectures...

	-hpa
-- 
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