Re: drivers/gpio/gpio-exar.c:52 exar_offset_to_sel_addr() warn: replace divide condition 'pin / 8' with 'pin >= 8'

[Andy Shevchenko <andy.shevchenko@gmail.com>]

Lähetetty iPhonesta

> Andy Shevchenko <andy.shevchenko@gmail.com> kirjoitti 25.12.2022 kello 12.45:
> 
> 
> 
> Lähetetty iPhonesta
> 
>>> Dan Carpenter <error27@gmail.com> kirjoitti 24.12.2022 kello 20.30:
>>> 
>>> On Sat, Dec 24, 2022 at 05:19:27PM +0100, Andy Shevchenko wrote:
>>> 
>>> 
>>> Lähetetty iPhonesta
>>> 
>>>> Dan Carpenter <error27@gmail.com> kirjoitti 23.12.2022 kello 11.54:
>>>> 
>>>> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
>>>> head:   f9ff5644bcc04221bae56f922122f2b7f5d24d62
>>>> commit: 5134272f9f3f71d4e1f3aa15cb09321af49b3646 gpio: exar: access MPIO registers on cascaded chips
>>>> config: ia64-randconfig-m031-20221218
>>>> compiler: ia64-linux-gcc (GCC) 12.1.0
>>>> 
>>>> If you fix the issue, kindly add following tag where applicable
>>>> | Reported-by: kernel test robot <lkp@intel.com>
>>>> | Reported-by: Dan Carpenter <error27@gmail.com>
>>>> 
>>>> smatch warnings:
>>>> drivers/gpio/gpio-exar.c:52 exar_offset_to_sel_addr() warn: replace divide condition 'pin / 8' with 'pin >= 8'
>>>> drivers/gpio/gpio-exar.c:62 exar_offset_to_lvl_addr() warn: replace divide condition 'pin / 8' with 'pin >= 8'
>>>> 
>>> 
>>> 
>>> 
>>> I don’t think this is a good advice. If we want to limit that, we need
>>> to check also upper limit. But. The GPIO framework does that. So,
>>> changing / to >= is bogus.
>> 
>> 
>> How is checking pin / 8 not mathematically equivalent to pin >= 8?
> 
> The point is that semantically the / is better in case this code will ever support more than two banks of pins.

On top of that it’s paired with pin % 8.


> 
>> I don't understand this code at all.  The divide is inscrutable  Is it
>> storing something in in the lower 3 bits and something in bit 4?  In
>> that case it might be nicer to just check (pin & BIT(4)).
>> 
>> regards,
>> dan carpenter
>> 
>>> 
>>> 
>>>> vim +52 drivers/gpio/gpio-exar.c
>>>> 
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  47  static unsigned int
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  48  exar_offset_to_sel_addr(struct exar_gpio_chip *exar_gpio, unsigned int offset)
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  49  {
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  50      unsigned int pin = exar_gpio->first_pin + (offset % 16);
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  51      unsigned int cascaded = offset / 16;
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02 @52      unsigned int addr = pin / 8 ? EXAR_OFFSET_MPIOSEL_HI : EXAR_OFFSET_MPIOSEL_LO;
>>>> 
>>>> Why not change this to pin > 8 instead.  Comparisons are faster than
>>>> divide ops.  Way more readable too.
>>>> 
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  53  
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  54      return addr + (cascaded ? exar_gpio->cascaded_offset : 0);
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  55  }
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  56  
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  57  static unsigned int
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  58  exar_offset_to_lvl_addr(struct exar_gpio_chip *exar_gpio, unsigned int offset)
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  59  {
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  60      unsigned int pin = exar_gpio->first_pin + (offset % 16);
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  61      unsigned int cascaded = offset / 16;
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02 @62      unsigned int addr = pin / 8 ? EXAR_OFFSET_MPIOLVL_HI : EXAR_OFFSET_MPIOLVL_LO;
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  63  
>>>> 5134272f9f3f71 Qingtao Cao         2022-09-02  64      return addr + (cascaded ? exar_gpio->cascaded_offset : 0);
>>>> 696868d0a79c21 Bartosz Golaszewski 2020-09-30  65  }
>>>> 
>>>> -- 
>>>> 0-DAY CI Kernel Test Service
>>>> https://01.org/lkp
>>>>