From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: "Clément Léger" <clement.leger@bootlin.com>,
"Andrew Lunn" <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Russell King" <linux@armlinux.org.uk>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Wolfram Sang" <wsa+renesas@sang-engineering.com>,
linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Biju Das" <biju.das.jz@bp.renesas.com>,
"Fabrizio Castro" <fabrizio.castro.jz@renesas.com>,
"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH net-next 01/10] dt-bindings: net: pcs: renesas,rzn1-miic: Document RZ/T2H and RZ/N2H SoCs
Date: Tue, 2 Sep 2025 13:17:06 +0100 [thread overview]
Message-ID: <CA+V-a8sSiNQ6W-ggmL8PP_G1sFq170DS1LJLFJs_WW0RC+XVEw@mail.gmail.com> (raw)
In-Reply-To: <20250902-enlightened-hidden-copperhead-4eefdf@kuoka>
Hi Krzysztof,
Thank you for the review.
On Tue, Sep 2, 2025 at 9:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On Mon, Sep 01, 2025 at 11:43:14PM +0100, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Extend the RZN1 MIIC device-tree binding schema to cover the RZ/T2H
> > and RZ/N2H SoCs. These SoCs have a MIIC converter similar to RZ/N1, but
> > with some differences:
> >
> > - RZ/T2H has two reset lines; RZ/N1 has none.
> > - RZ/N1 supports 5 MIIC ports, whereas RZ/T2H supports 4 ports.
> > - On RZ/N1, MIIC ports can be mapped to various endpoints such as RTOS
> > MAC ports, switch ports, EtherCAT ports, SERCOS ports, HSR ports, or
> > fixed PHY ports (covering PHY input indices 0-13). On RZ/T2H, ports
> > can connect to EtherCAT slave ports, Ethernet switch ports, or GMAC
> > ports (mapped to PHY input indices 0-8).
> > - There are register bit differences between the SoCs, and RZ/N1 has
> > additional registers currently unused by the driver.
> > - On RZ/T2H, the switch is connected to GMAC0 whereas on RZ/N1 the
> > switch can be connected to GMAC2/HW-RTOS GMAC.
> >
> > To accommodate these differences, a new generic compatible string
> > `renesas,rzt2h-miic` is introduced for both RZ/T2H and RZ/N2H variants.
> >
> > The DT schema is updated to validate these differences and ensure proper
> > port and reset configurations per SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > .../bindings/net/pcs/renesas,rzn1-miic.yaml | 171 +++++++++++++-----
> > include/dt-bindings/net/pcs-rzt2h-miic.h | 23 +++
> > 2 files changed, 148 insertions(+), 46 deletions(-)
> > create mode 100644 include/dt-bindings/net/pcs-rzt2h-miic.h
> >
> > diff --git a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> > index 2d33bbab7163..832a49877a29 100644
> > --- a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> > +++ b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> > @@ -4,13 +4,14 @@
> > $id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
> > $schema: http://devicetree.org/meta-schemas/core.yaml#
> >
> > -title: Renesas RZ/N1 MII converter
> > +title: Renesas RZ/{N1, N2H, T2H} MII converter
>
> Don't use regex here. RZ/N1, RZ/N2H and TZ/T2H....
>
Ok, I will use it as above (s/TZ/T2H/RZ/T2H).
> >
> > maintainers:
> > - Clément Léger <clement.leger@bootlin.com>
> > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > description: |
> > - This MII converter is present on the Renesas RZ/N1 SoC family. It is
> > + This MII converter is present on the Renesas RZ/{N1, N2H, T2H} SoC families. It is
>
> Just list the soc families, so people can grep for it.
>
Ok.
> > responsible to do MII passthrough or convert it to RMII/RGMII.
> >
> > properties:
> > @@ -21,10 +22,17 @@ properties:
> > const: 0
> >
> > compatible:
> > - items:
> > - - enum:
> > - - renesas,r9a06g032-miic
> > - - const: renesas,rzn1-miic
> > + oneOf:
> > + - items:
> > + - enum:
> > + - renesas,r9a06g032-miic
> > + - const: renesas,rzn1-miic
> > +
> > + - items:
> > + - enum:
> > + - renesas,r9a09g077-miic # RZ/T2H
> > + - renesas,r9a09g087-miic # RZ/N2H
> > + - const: renesas,rzt2h-miic
> >
> > reg:
> > maxItems: 1
> > @@ -43,11 +51,20 @@ properties:
> > - const: rmii_ref
> > - const: hclk
> >
> > + resets:
> > + items:
> > + - description: Converter register reset
> > + - description: Converter reset
> > +
> > + reset-names:
> > + items:
> > + - const: rst
> > + - const: crst
> > +
> > renesas,miic-switch-portin:
> > description: MII Switch PORTIN configuration. This value should use one of
> > the values defined in dt-bindings/net/pcs-rzn1-miic.h.
> > $ref: /schemas/types.yaml#/definitions/uint32
> > - enum: [1, 2]
>
> Why? Widest constraints should be here.
>
Ok, I will keep this as is and just adjust for RZ/T2H SoC.
> >
> > power-domains:
> > maxItems: 1
> > @@ -60,11 +77,11 @@ patternProperties:
> > properties:
> > reg:
> > description: MII Converter port number.
> > - enum: [1, 2, 3, 4, 5]
>
> Why?
>
If I keep this here and just adjust the below for RZ/T2H case I do get errors:
reg:
enum: [0, 1, 2, 3]
arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dtb: ethss@80110000
(renesas,r9a09g077-miic): mii-conv@0:reg:0:0: 0 is not one of [1, 2,
3, 4, 5]
from schema $id:
http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
Any pointers on how to handle this case?
> >
> > renesas,miic-input:
> > description: Converter input port configuration. This value should use
> > - one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.
> > + one of the values defined in dt-bindings/net/pcs-rzn1-miic.h for RZ/N1 SoC
> > + and include/dt-bindings/net/pcs-rzt2h-miic.h for RZ/{T2H, N2H} SoCs.
> > $ref: /schemas/types.yaml#/definitions/uint32
> >
> > required:
> > @@ -73,47 +90,109 @@ patternProperties:
> >
> > additionalProperties: false
> >
> > - allOf:
> > - - if:
> > - properties:
> > - reg:
> > - const: 1
> > - then:
> > - properties:
> > - renesas,miic-input:
> > - const: 0
> > - - if:
> > +allOf:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: renesas,rzn1-miic
> > + then:
> > + properties:
> > + renesas,miic-switch-portin:
> > + enum: [1, 2]
> > + patternProperties:
> > + "^mii-conv@[0-5]$":
> > properties:
> > reg:
> > - const: 2
> > - then:
> > - properties:
> > - renesas,miic-input:
> > - enum: [1, 11]
> > - - if:
> > - properties:
> > - reg:
> > - const: 3
> > - then:
> > - properties:
> > - renesas,miic-input:
> > - enum: [7, 10]
> > - - if:
> > + enum: [1, 2, 3, 4, 5]
> > + resets: false
> > + reset-names: false
> > + allOf:
> > + - if:
> > + properties:
> > + reg:
> > + const: 1
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + const: 0
> > + - if:
> > + properties:
> > + reg:
> > + const: 2
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + enum: [1, 11]
> > + - if:
> > + properties:
> > + reg:
> > + const: 3
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + enum: [7, 10]
> > + - if:
> > + properties:
> > + reg:
> > + const: 4
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + enum: [4, 6, 9, 13]
> > + - if:
> > + properties:
> > + reg:
> > + const: 5
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + enum: [3, 5, 8, 12]
> > + else:
> > + properties:
> > + renesas,miic-switch-portin:
> > + const: 0
> > + required:
> > + - resets
> > + - reset-names
> > + patternProperties:
> > + "^mii-conv@[0-5]$":
> > properties:
> > reg:
> > - const: 4
> > - then:
> > - properties:
> > - renesas,miic-input:
> > - enum: [4, 6, 9, 13]
> > - - if:
> > - properties:
> > - reg:
> > - const: 5
> > - then:
> > - properties:
> > - renesas,miic-input:
> > - enum: [3, 5, 8, 12]
> > + enum: [0, 1, 2, 3]
> > + allOf:
> > + - if:
> > + properties:
> > + reg:
> > + const: 0
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + enum: [0, 3, 6]
> > + - if:
> > + properties:
> > + reg:
> > + const: 1
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + enum: [1, 4, 7]
> > + - if:
> > + properties:
> > + reg:
> > + const: 2
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + enum: [2, 5, 8]
> > + - if:
> > + properties:
> > + reg:
> > + const: 3
> > + then:
> > + properties:
> > + renesas,miic-input:
> > + const: 1
> >
> > required:
> > - '#address-cells'
> > diff --git a/include/dt-bindings/net/pcs-rzt2h-miic.h b/include/dt-bindings/net/pcs-rzt2h-miic.h
> > new file mode 100644
> > index 000000000000..c1f35fc0f1cd
> > --- /dev/null
> > +++ b/include/dt-bindings/net/pcs-rzt2h-miic.h
>
> Missing vendor prefix. Filename based on compatible, unless this is not
> for Renesas?
>
Agreed, I missed that I will add the vendor prefix and name it to
`renesas,r9a09g077-pcs-miic.h`.
Cheers,
Prabhakar
next prev parent reply other threads:[~2025-09-02 12:17 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-01 22:43 [PATCH net-next 00/10] Add PCS support for Renesas RZ/{T2H,N2H} SoCs Prabhakar
2025-09-01 22:43 ` [PATCH net-next 01/10] dt-bindings: net: pcs: renesas,rzn1-miic: Document RZ/T2H and RZ/N2H SoCs Prabhakar
2025-09-02 8:45 ` Krzysztof Kozlowski
2025-09-02 12:17 ` Lad, Prabhakar [this message]
2025-09-02 12:21 ` Krzysztof Kozlowski
2025-09-02 14:19 ` Lad, Prabhakar
2025-09-03 9:12 ` Geert Uytterhoeven
2025-09-03 9:55 ` Lad, Prabhakar
2025-09-01 22:43 ` [PATCH net-next 02/10] net: pcs: rzn1-miic: Drop trailing comma from of_device_id table Prabhakar
2025-09-01 22:43 ` [PATCH net-next 03/10] net: pcs: rzn1-miic: Add missing include files Prabhakar
2025-09-01 22:43 ` [PATCH net-next 04/10] net: pcs: rzn1-miic: Move configuration data to SoC-specific struct Prabhakar
2025-09-01 22:43 ` [PATCH net-next 05/10] net: pcs: rzn1-miic: move port range handling into SoC data Prabhakar
2025-09-01 22:43 ` [PATCH net-next 06/10] net: pcs: rzn1-miic: Make switch mode mask SoC-specific Prabhakar
2025-09-01 22:43 ` [PATCH net-next 07/10] net: pcs: rzn1-miic: Add support to handle resets Prabhakar
2025-09-01 22:43 ` [PATCH net-next 08/10] net: pcs: rzn1-miic: add per-SoC control for MIIC register unlock/lock Prabhakar
2025-09-01 22:43 ` [PATCH net-next 09/10] net: pcs: rzn1-miic: Add RZ/T2H MIIC support Prabhakar
2025-09-01 22:43 ` [PATCH net-next 10/10] net: pcs: rzn1-miic: Add PCS validate callback for RZ/T2H MIIC Prabhakar
2025-09-02 9:34 ` Russell King (Oracle)
2025-09-02 10:26 ` Lad, Prabhakar
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