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[209.85.219.182]) by smtp.gmail.com with ESMTPSA id 00721157ae682-70f8acd51aesm28953687b3.84.2025.06.04.01.36.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Jun 2025 01:36:54 -0700 (PDT) Received: by mail-yb1-f182.google.com with SMTP id 3f1490d57ef6-e7dd151f79eso6290894276.2; Wed, 04 Jun 2025 01:36:54 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCULW+UTfFh+tT0J44z1K6JYbmHlv/wd1MXXy7KKCEtBGCgRyN797NLiJGgErUHzPXOAy1j8TsWLlWFEvLw=@vger.kernel.org, AJvYcCVM/NXB0C5w3H9PDbxdx4ri8kz+r+wR0mHzdoTZllFU2cIVxw7UCYZjGJHgpab0v+R3bmH7+U8Bnwq9@vger.kernel.org, AJvYcCX431fODxXURRvDjMnwc5r0kvbnILTzAMgl36ph0qdgXUQo9BcH8muM4qlc6MQurVWU4qfxZ00XfSf9uohh@vger.kernel.org, AJvYcCXR51l+eC1sz1L0RVb2S89pJmWSbVH8OLrbhdLbrbiuT45xLlBrHwMiWjIlw3kqVx0EY4fXfN8N0Mnd@vger.kernel.org X-Received: by 2002:a05:6902:2684:b0:e7d:cfd0:957f with SMTP id 3f1490d57ef6-e8179c4e822mr2337109276.11.1749026214087; Wed, 04 Jun 2025 01:36:54 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250604-6-10-rocket-v6-0-237ac75ddb5e@tomeuvizoso.net> <20250604-6-10-rocket-v6-1-237ac75ddb5e@tomeuvizoso.net> <2024813.jZfb76A358@diego> In-Reply-To: <2024813.jZfb76A358@diego> From: Tomeu Vizoso Date: Wed, 4 Jun 2025 10:36:42 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AX0GCFvL5nJeCruhYVKFwWz9ImMH3rGz7U0FgI_gqBjbHTrFFbFoGu46LHESGLo Message-ID: Subject: Re: [PATCH v6 01/10] dt-bindings: npu: rockchip,rknn: Add bindings To: =?UTF-8?Q?Heiko_St=C3=BCbner?= Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oded Gabbay , Jonathan Corbet , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sumit Semwal , =?UTF-8?Q?Christian_K=C3=B6nig?= , Sebastian Reichel , Nicolas Frattaroli , Kever Yang , Jeff Hugo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, Krzysztof Kozlowski Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Jun 4, 2025 at 10:25=E2=80=AFAM Heiko St=C3=BCbner wrote: > > Am Mittwoch, 4. Juni 2025, 09:57:14 Mitteleurop=C3=A4ische Sommerzeit sch= rieb Tomeu Vizoso: > > Add the bindings for the Neural Processing Unit IP from Rockchip. > > > > v2: > > - Adapt to new node structure (one node per core, each with its own > > IOMMU) > > - Several misc. fixes from Sebastian Reichel > > > > v3: > > - Split register block in its constituent subblocks, and only require > > the ones that the kernel would ever use (Nicolas Frattaroli) > > - Group supplies (Rob Herring) > > - Explain the way in which the top core is special (Rob Herring) > > > > v4: > > - Change required node name to npu@ (Rob Herring and Krzysztof Kozlowsk= i) > > - Remove unneeded items: (Krzysztof Kozlowski) > > - Fix use of minItems/maxItems (Krzysztof Kozlowski) > > - Add reg-names to list of required properties (Krzysztof Kozlowski) > > - Fix example (Krzysztof Kozlowski) > > > > v5: > > - Rename file to rockchip,rk3588-rknn-core.yaml (Krzysztof Kozlowski) > > - Streamline compatible property (Krzysztof Kozlowski) > > > > v6: > > - Remove mention to NVDLA, as the hardware is only incidentally related > > (Kever Yang) > > - Mark pclk and npu clocks as required by all clocks (Rob Herring) > > > > Signed-off-by: Sebastian Reichel > > Signed-off-by: Tomeu Vizoso > > Reviewed-by: Krzysztof Kozlowski > > --- > > .../bindings/npu/rockchip,rk3588-rknn-core.yaml | 144 +++++++++++++= ++++++++ > > 1 file changed, 144 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn= -core.yaml b/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-cor= e.yaml > > new file mode 100644 > > index 0000000000000000000000000000000000000000..9a5e9e213912d0997da2f6a= e26189adf044dcc7b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/npu/rockchip,rk3588-rknn-core.y= aml > > @@ -0,0 +1,144 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/npu/rockchip,rk3588-rknn-core.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Neural Processing Unit IP from Rockchip > > + > > +maintainers: > > + - Tomeu Vizoso > > + > > +description: > > + Rockchip IP for accelerating inference of neural networks. > > + > > + There is to be a node per each core in the NPU. In Rockchip's design= there > > + will be one core that is special and needs to be powered on before a= ny of the > > + other cores can be used. This special core is called the top core an= d should > > + have the compatible string that corresponds to top cores. > > + > > +properties: > > + $nodename: > > + pattern: '^npu@[a-f0-9]+$' > > + > > + compatible: > > + enum: > > + - rockchip,rk3588-rknn-core-top > > + - rockchip,rk3588-rknn-core > > + > > + reg: > > + maxItems: 3 > > + > > + reg-names: > > + items: > > + - const: pc > > + - const: cna > > + - const: core > > + > > + clocks: > > + maxItems: 4 > > + > > + clock-names: > > + items: > > + - const: aclk > > + - const: hclk > > + - const: npu > > + - const: pclk > > + > > + interrupts: > > + maxItems: 1 > > + > > + iommus: > > + maxItems: 1 > > + > > + npu-supply: true > > + > > + power-domains: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 2 > > + > > + reset-names: > > + items: > > + - const: srst_a > > + - const: srst_h > > + > > + sram-supply: true > > + > > +required: > > + - compatible > > + - reg > > + - reg-names > > + - clocks > > + - clock-names > > + - interrupts > > + - iommus > > + - power-domains > > + - resets > > + - reset-names > > + - npu-supply > > + - sram-supply > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - rockchip,rknn-core-top > > should be rockchip,rk3588-rknn-core-top I think > > > + then: > > + properties: > > + clocks: > > + minItems: 4 > > + > > + clock-names: > > + minItems: 4 > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - rockchip,rknn-core > > should be rockchip,rk3588-rknn-core Thanks. Actually, all the addOf section is not needed any more as we now know that from a resources point of view all cores are the same. Cheers, Tomeu > > + then: > > + properties: > > + clocks: > > + maxItems: 2 > > + clock-names: > > + maxItems: 2 > > > Heiko > >