[PATCH v3 0/3] LoongArch: Add Loongson-2K BMC support

[PATCH v3 0/3] LoongArch: Add Loongson-2K BMC support

[Binbin Zhou]

Hi all:

This patch set introduces the Loongson-2K BMC.

It is a PCIe device present on servers similar to the Loongson-3C6000.
And it is a multifunctional device (MFD), such as display as a sub-function
of it.

For IPMI, according to the existing design, we use software simulation to
implement the KCS interface registers: Stauts/Command/Data_Out/Data_In.

Also since both host side and BMC side read and write kcs status, we use
fifo pointer to ensure data consistency.

For the display, based on simpledrm, the resolution is read from a fixed
position in the BMC since the hardware does not support auto-detection
of the resolution. Of course, we will try to support multiple
resolutions later, through a vbios-like approach.

Especially, for the BMC reset function, since the display will be
disconnected when BMC reset, we made a special treatment of re-push.

Based on this, I will present it in four patches:
patch-1: BMC device PCI resource allocation.
patch-2: IPMI implementation
patch-3: BMC reset function support

Thanks.

-------
V3:
Patch (1/3):
 - Drop "MFD" in title and comment;
 - Fromatting code;
 - Add clearer comments.
Patch (2/3):
 - Rebase linux-ipmi/next tree;
 - Update commit message;
 - Use readx()/writex() to read and write IPMI data instead of structure
   pointer references;
 - CONFIG_LOONGARCH -> MFD_LS2K_BMC;
 - Drop unused output.
Patch (3/3):
 - Update commit message;
 - Inline the ls2k_bmc_gpio_reset_handler() function to ls2k_bmc_pdata_initial();
 - Add clearer comments.
 - Use proper multi-line commentary as per the Coding Style documentation;
 - Define all magic numbers.

Link to V2:
https://lore.kernel.org/all/cover.1747276047.git.zhoubinbin@loongson.cn/

V2:
- Drop ls2kdrm, use simpledrm instead.
Patch (1/3):
 - Use DEFINE_RES_MEM_NAMED/MFD_CELL_RES simplified code;
 - Add resolution fetching due to replacing the original display
   solution with simpledrm; 
 - Add aperture_remove_conflicting_devices() to avoid efifb
   conflict with simpledrm.
Patch (3/3):
 - This part of the function, moved from the original ls2kdrm to mfd;
 - Use set_console to implement the Re-push display function.

Link to V1:
https://lore.kernel.org/all/cover.1735550269.git.zhoubinbin@loongson.cn/

Binbin Zhou (3):
  mfd: ls2kbmc: Introduce Loongson-2K BMC core driver
  ipmi: Add Loongson-2K BMC support
  mfd: ls2kbmc: Add Loongson-2K BMC reset function support

 drivers/char/ipmi/Makefile       |   1 +
 drivers/char/ipmi/ipmi_si.h      |   7 +
 drivers/char/ipmi/ipmi_si_intf.c |   3 +
 drivers/char/ipmi/ipmi_si_ls2k.c | 190 ++++++++++++
 drivers/mfd/Kconfig              |  12 +
 drivers/mfd/Makefile             |   2 +
 drivers/mfd/ls2kbmc-mfd.c        | 482 +++++++++++++++++++++++++++++++
 7 files changed, 697 insertions(+)
 create mode 100644 drivers/char/ipmi/ipmi_si_ls2k.c
 create mode 100644 drivers/mfd/ls2kbmc-mfd.c


base-commit: 08effa6b77f7dbb4727f811daef0f6085c0d63c8
-- 
2.47.1

[PATCH v3 1/3] mfd: ls2kbmc: Introduce Loongson-2K BMC core driver

[Binbin Zhou]

The Loongson-2K Board Management Controller provides an PCIe interface
to the host to access the feature implemented in the BMC.

The BMC is assembled on a server similar to the server machine with
Loongson-3C6000 CPUs. It supports multiple sub-devices like DRM.

Co-developed-by: Chong Qiao <qiaochong@loongson.cn>
Signed-off-by: Chong Qiao <qiaochong@loongson.cn>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
---
 drivers/mfd/Kconfig       |  12 +++
 drivers/mfd/Makefile      |   2 +
 drivers/mfd/ls2kbmc-mfd.c | 156 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 170 insertions(+)
 create mode 100644 drivers/mfd/ls2kbmc-mfd.c

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 22b936310039..4993b0708fe5 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2422,5 +2422,17 @@ config MFD_UPBOARD_FPGA
 	  To compile this driver as a module, choose M here: the module will be
 	  called upboard-fpga.
 
+config MFD_LS2K_BMC
+	tristate "Loongson-2K Board Management Controller Support"
+	depends on LOONGARCH
+	default y if LOONGARCH
+	select MFD_CORE
+	help
+	  Say yes here to add support for the Loongson-2K BMC which is a Board
+	  Management Controller connected to the PCIe bus. The device supports
+	  multiple sub-devices like DRM. This driver provides common support for
+	  accessing the devices; additional drivers must be enabled in order to
+	  use the functionality of the BMC device.
+
 endmenu
 endif
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 948cbdf42a18..18960ea13b64 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -290,3 +290,5 @@ obj-$(CONFIG_MFD_RSMU_I2C)	+= rsmu_i2c.o rsmu_core.o
 obj-$(CONFIG_MFD_RSMU_SPI)	+= rsmu_spi.o rsmu_core.o
 
 obj-$(CONFIG_MFD_UPBOARD_FPGA)	+= upboard-fpga.o
+
+obj-$(CONFIG_MFD_LS2K_BMC)	+= ls2kbmc-mfd.o
diff --git a/drivers/mfd/ls2kbmc-mfd.c b/drivers/mfd/ls2kbmc-mfd.c
new file mode 100644
index 000000000000..9dbcb5b371f9
--- /dev/null
+++ b/drivers/mfd/ls2kbmc-mfd.c
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Loongson-2K Board Management Controller (BMC) Core Driver.
+ *
+ * Copyright (C) 2024-2025 Loongson Technology Corporation Limited.
+ *
+ * Authors:
+ *	Chong Qiao <qiaochong@loongson.cn>
+ *	Binbin Zhou <zhoubinbin@loongson.cn>
+ */
+
+#include <linux/aperture.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mfd/core.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
+#include <linux/platform_data/simplefb.h>
+#include <linux/platform_device.h>
+
+/* LS2K BMC resources */
+#define LS2K_DISPLAY_RES_START		(SZ_16M + SZ_2M)
+#define LS2K_IPMI_RES_SIZE		0x1C
+#define LS2K_IPMI0_RES_START		(SZ_16M + 0xF00000)
+#define LS2K_IPMI1_RES_START		(LS2K_IPMI0_RES_START + LS2K_IPMI_RES_SIZE)
+#define LS2K_IPMI2_RES_START		(LS2K_IPMI1_RES_START + LS2K_IPMI_RES_SIZE)
+#define LS2K_IPMI3_RES_START		(LS2K_IPMI2_RES_START + LS2K_IPMI_RES_SIZE)
+#define LS2K_IPMI4_RES_START		(LS2K_IPMI3_RES_START + LS2K_IPMI_RES_SIZE)
+
+static struct resource ls2k_display_resources[] = {
+	DEFINE_RES_MEM_NAMED(LS2K_DISPLAY_RES_START, SZ_4M, "simpledrm-res"),
+};
+
+static struct resource ls2k_ipmi0_resources[] = {
+	DEFINE_RES_MEM_NAMED(LS2K_IPMI0_RES_START, LS2K_IPMI_RES_SIZE, "ipmi0-res"),
+};
+
+static struct resource ls2k_ipmi1_resources[] = {
+	DEFINE_RES_MEM_NAMED(LS2K_IPMI1_RES_START, LS2K_IPMI_RES_SIZE, "ipmi1-res"),
+};
+
+static struct resource ls2k_ipmi2_resources[] = {
+	DEFINE_RES_MEM_NAMED(LS2K_IPMI2_RES_START, LS2K_IPMI_RES_SIZE, "ipmi2-res"),
+};
+
+static struct resource ls2k_ipmi3_resources[] = {
+	DEFINE_RES_MEM_NAMED(LS2K_IPMI3_RES_START, LS2K_IPMI_RES_SIZE, "ipmi3-res"),
+};
+
+static struct resource ls2k_ipmi4_resources[] = {
+	DEFINE_RES_MEM_NAMED(LS2K_IPMI4_RES_START, LS2K_IPMI_RES_SIZE, "ipmi4-res"),
+};
+
+static struct mfd_cell ls2k_bmc_cells[] = {
+	MFD_CELL_RES("simple-framebuffer", ls2k_display_resources),
+	MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi0_resources),
+	MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi1_resources),
+	MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi2_resources),
+	MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi3_resources),
+	MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi4_resources),
+};
+
+/*
+ * Currently the Loongson-2K BMC hardware does not have an I2C interface to adapt to the
+ * resolution. We set the resolution by presetting "video=1280x1024-16@2M" to the BMC memory.
+ */
+static int ls2k_bmc_parse_mode(struct pci_dev *pdev, struct simplefb_platform_data *pd)
+{
+	char *mode;
+	int depth, ret;
+
+	/* The last 16M of PCI BAR0 is used to store the resolution string. */
+	mode = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0) + SZ_16M, SZ_16M);
+	if (!mode)
+		return -ENOMEM;
+
+	/* The resolution field starts with the flag "video=". */
+	if (!strncmp(mode, "video=", 6))
+		mode = mode + 6;
+
+	ret = kstrtoint(strsep(&mode, "x"), 10, &pd->width);
+	if (ret)
+		return ret;
+
+	ret = kstrtoint(strsep(&mode, "-"), 10, &pd->height);
+	if (ret)
+		return ret;
+
+	ret = kstrtoint(strsep(&mode, "@"), 10, &depth);
+	if (ret)
+		return ret;
+
+	pd->stride = pd->width * depth / 8;
+	pd->format = depth == 32 ? "a8r8g8b8" : "r5g6b5";
+
+	return 0;
+}
+
+static int ls2k_bmc_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+	struct simplefb_platform_data pd;
+	resource_size_t base;
+	int ret;
+
+	ret = pci_enable_device(dev);
+	if (ret)
+		return ret;
+
+	ret = ls2k_bmc_parse_mode(dev, &pd);
+	if (ret)
+		goto disable_pci;
+
+	ls2k_bmc_cells[0].platform_data = &pd;
+	ls2k_bmc_cells[0].pdata_size = sizeof(pd);
+	base = dev->resource[0].start + LS2K_DISPLAY_RES_START;
+
+	/* Remove conflicting efifb device */
+	ret = aperture_remove_conflicting_devices(base, SZ_4M, "simple-framebuffer");
+	if (ret) {
+		dev_err(&dev->dev, "Failed to removed firmware framebuffers: %d\n", ret);
+		goto disable_pci;
+	}
+
+	return devm_mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO,
+				    ls2k_bmc_cells, ARRAY_SIZE(ls2k_bmc_cells),
+				    &dev->resource[0], 0, NULL);
+
+disable_pci:
+	pci_disable_device(dev);
+	return ret;
+}
+
+static void ls2k_bmc_remove(struct pci_dev *dev)
+{
+	pci_disable_device(dev);
+}
+
+static struct pci_device_id ls2k_bmc_devices[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, 0x1a05) },
+	{ }
+};
+MODULE_DEVICE_TABLE(pci, ls2k_bmc_devices);
+
+static struct pci_driver ls2k_bmc_driver = {
+	.name = "ls2k-bmc",
+	.id_table = ls2k_bmc_devices,
+	.probe = ls2k_bmc_probe,
+	.remove = ls2k_bmc_remove,
+};
+module_pci_driver(ls2k_bmc_driver);
+
+MODULE_DESCRIPTION("Loongson-2K BMC driver");
+MODULE_AUTHOR("Loongson Technology Corporation Limited");
+MODULE_LICENSE("GPL");
-- 
2.47.1

[PATCH v3 2/3] ipmi: Add Loongson-2K BMC support

[Binbin Zhou]

This patch adds Loongson-2K BMC IPMI support.

According to the existing design, we use software simulation to
implement the KCS interface registers: Stauts/Command/Data_Out/Data_In.

Also since both host side and BMC side read and write kcs status, fifo flag
is used to ensure data consistency.

The single KCS message block is as follows:

+-------------------------------------------------------------------------+
|FIFO flags| KCS register data | CMD data | KCS version | WR REQ | WR ACK |
+-------------------------------------------------------------------------+

Co-developed-by: Chong Qiao <qiaochong@loongson.cn>
Signed-off-by: Chong Qiao <qiaochong@loongson.cn>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
---
 drivers/char/ipmi/Makefile       |   1 +
 drivers/char/ipmi/ipmi_si.h      |   7 ++
 drivers/char/ipmi/ipmi_si_intf.c |   3 +
 drivers/char/ipmi/ipmi_si_ls2k.c | 190 +++++++++++++++++++++++++++++++
 4 files changed, 201 insertions(+)
 create mode 100644 drivers/char/ipmi/ipmi_si_ls2k.c

diff --git a/drivers/char/ipmi/Makefile b/drivers/char/ipmi/Makefile
index e0944547c9d0..17308dd6be20 100644
--- a/drivers/char/ipmi/Makefile
+++ b/drivers/char/ipmi/Makefile
@@ -8,6 +8,7 @@ ipmi_si-y := ipmi_si_intf.o ipmi_kcs_sm.o ipmi_smic_sm.o ipmi_bt_sm.o \
 	ipmi_si_mem_io.o
 ipmi_si-$(CONFIG_HAS_IOPORT) += ipmi_si_port_io.o
 ipmi_si-$(CONFIG_PCI) += ipmi_si_pci.o
+ipmi_si-$(CONFIG_MFD_LS2K_BMC) += ipmi_si_ls2k.o
 ipmi_si-$(CONFIG_PARISC) += ipmi_si_parisc.o
 
 obj-$(CONFIG_IPMI_HANDLER) += ipmi_msghandler.o
diff --git a/drivers/char/ipmi/ipmi_si.h b/drivers/char/ipmi/ipmi_si.h
index 508c3fd45877..f38ea4f4c891 100644
--- a/drivers/char/ipmi/ipmi_si.h
+++ b/drivers/char/ipmi/ipmi_si.h
@@ -101,6 +101,13 @@ void ipmi_si_pci_shutdown(void);
 static inline void ipmi_si_pci_init(void) { }
 static inline void ipmi_si_pci_shutdown(void) { }
 #endif
+#ifdef CONFIG_MFD_LS2K_BMC
+void ipmi_si_ls2k_init(void);
+void ipmi_si_ls2k_shutdown(void);
+#else
+static inline void ipmi_si_ls2k_init(void) { }
+static inline void ipmi_si_ls2k_shutdown(void) { }
+#endif
 #ifdef CONFIG_PARISC
 void ipmi_si_parisc_init(void);
 void ipmi_si_parisc_shutdown(void);
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index 7fe891783a37..c13d5132fffc 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -2120,6 +2120,7 @@ static int __init init_ipmi_si(void)
 
 	ipmi_si_pci_init();
 
+	ipmi_si_ls2k_init();
 	ipmi_si_parisc_init();
 
 	mutex_lock(&smi_infos_lock);
@@ -2334,6 +2335,8 @@ static void cleanup_ipmi_si(void)
 
 	ipmi_si_pci_shutdown();
 
+	ipmi_si_ls2k_shutdown();
+
 	ipmi_si_parisc_shutdown();
 
 	ipmi_si_platform_shutdown();
diff --git a/drivers/char/ipmi/ipmi_si_ls2k.c b/drivers/char/ipmi/ipmi_si_ls2k.c
new file mode 100644
index 000000000000..71159e9882b7
--- /dev/null
+++ b/drivers/char/ipmi/ipmi_si_ls2k.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Driver for Loongson-2K BMC IPMI
+ *
+ * Copyright (C) 2024-2025 Loongson Technology Corporation Limited.
+ *
+ * Authors:
+ *	Chong Qiao <qiaochong@loongson.cn>
+ *	Binbin Zhou <zhoubinbin@loongson.cn>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/types.h>
+
+#include "ipmi_si.h"
+
+#define LS2K_KCS_FIFO_IBFH	0x0
+#define LS2K_KCS_FIFO_IBFT	0x1
+#define LS2K_KCS_FIFO_OBFH	0x2
+#define LS2K_KCS_FIFO_OBFT	0x3
+
+/* KCS registers */
+#define LS2K_KCS_REG_STS	0x4
+#define LS2K_KCS_REG_DATA_OUT	0x5
+#define LS2K_KCS_REG_DATA_IN	0x6
+#define LS2K_KCS_REG_CMD	0x8
+
+#define LS2K_KCS_CMD_DATA	0xa
+#define LS2K_KCS_VERSION	0xb
+#define LS2K_KCS_WR_REQ		0xc
+#define LS2K_KCS_WR_ACK		0x10
+
+#define LS2K_KCS_STS_OBF	BIT(0)
+#define LS2K_KCS_STS_IBF	BIT(1)
+#define LS2K_KCS_STS_SMS_ATN	BIT(2)
+#define LS2K_KCS_STS_CMD	BIT(3)
+
+#define LS2K_KCS_DATA_MASK	(LS2K_KCS_STS_OBF | LS2K_KCS_STS_IBF | LS2K_KCS_STS_CMD)
+
+static bool ls2k_registered;
+
+static unsigned char ls2k_mem_inb_v0(const struct si_sm_io *io, unsigned int offset)
+{
+	void __iomem *addr = io->addr;
+	int reg_offset;
+
+	if (offset & BIT(0)) {
+		reg_offset = LS2K_KCS_REG_STS;
+	} else {
+		writeb(readb(addr + LS2K_KCS_REG_STS) & ~LS2K_KCS_STS_OBF,
+		       addr + LS2K_KCS_REG_STS);
+		reg_offset = LS2K_KCS_REG_DATA_OUT;
+	}
+
+	return readb(addr + reg_offset);
+}
+
+static unsigned char ls2k_mem_inb_v1(const struct si_sm_io *io, unsigned int offset)
+{
+	void __iomem *addr = io->addr;
+	unsigned char inb = 0, cmd;
+	bool obf, ibf;
+
+	obf = readb(addr + LS2K_KCS_FIFO_OBFH) ^ readb(addr + LS2K_KCS_FIFO_OBFT);
+	ibf = readb(addr + LS2K_KCS_FIFO_IBFH) ^ readb(addr + LS2K_KCS_FIFO_IBFT);
+	cmd = readb(addr + LS2K_KCS_CMD_DATA);
+
+	if (offset & BIT(0)) {
+		inb = readb(addr + LS2K_KCS_REG_STS) & ~LS2K_KCS_DATA_MASK;
+		inb |= FIELD_PREP(LS2K_KCS_STS_OBF, obf)
+		    | FIELD_PREP(LS2K_KCS_STS_IBF, ibf)
+		    | FIELD_PREP(LS2K_KCS_STS_CMD, cmd);
+	} else {
+		inb = readb(addr + LS2K_KCS_REG_DATA_OUT);
+		writeb(readb(addr + LS2K_KCS_FIFO_OBFH), addr + LS2K_KCS_FIFO_OBFT);
+	}
+
+	return inb;
+}
+
+static void ls2k_mem_outb_v0(const struct si_sm_io *io, unsigned int offset,
+			     unsigned char val)
+{
+	void __iomem *addr = io->addr;
+	unsigned char sts = readb(addr + LS2K_KCS_REG_STS);
+	int reg_offset;
+
+	if (sts & LS2K_KCS_STS_IBF)
+		return;
+
+	if (offset & BIT(0)) {
+		reg_offset = LS2K_KCS_REG_CMD;
+		sts |= LS2K_KCS_STS_CMD;
+	} else {
+		reg_offset = LS2K_KCS_REG_DATA_IN;
+		sts &= ~LS2K_KCS_STS_CMD;
+	}
+
+	writew(val, addr + reg_offset);
+	writeb(sts | LS2K_KCS_STS_IBF, addr + LS2K_KCS_REG_STS);
+	writel(readl(addr + LS2K_KCS_WR_REQ) + 1, addr + LS2K_KCS_WR_REQ);
+}
+
+static void ls2k_mem_outb_v1(const struct si_sm_io *io, unsigned int offset,
+			     unsigned char val)
+{
+	void __iomem *addr = io->addr;
+	unsigned char ibfh, ibft;
+	int reg_offset;
+
+	ibfh = readb(addr + LS2K_KCS_FIFO_IBFH);
+	ibft = readb(addr + LS2K_KCS_FIFO_IBFT);
+
+	if (ibfh ^ ibft)
+		return;
+
+	reg_offset = (offset & BIT(0)) ? LS2K_KCS_REG_CMD : LS2K_KCS_REG_DATA_IN;
+	writew(val, addr + reg_offset);
+
+	writeb(offset & BIT(0), addr + LS2K_KCS_CMD_DATA);
+	writeb(!ibft, addr + LS2K_KCS_FIFO_IBFH);
+	writel(readl(addr + LS2K_KCS_WR_REQ) + 1, addr + LS2K_KCS_WR_REQ);
+}
+
+static void ls2k_mem_cleanup(struct si_sm_io *io)
+{
+	if (io->addr)
+		iounmap(io->addr);
+}
+
+static int ipmi_ls2k_mem_setup(struct si_sm_io *io)
+{
+	unsigned char version;
+
+	io->addr = ioremap(io->addr_data, io->regspacing);
+	if (!io->addr)
+		return -EIO;
+
+	version = readb(io->addr + LS2K_KCS_VERSION);
+
+	io->inputb = version ? ls2k_mem_inb_v1 : ls2k_mem_inb_v0;
+	io->outputb = version ? ls2k_mem_outb_v1 : ls2k_mem_outb_v0;
+	io->io_cleanup = ls2k_mem_cleanup;
+
+	return 0;
+}
+
+static int ipmi_ls2k_probe(struct platform_device *pdev)
+{
+	struct si_sm_io io;
+
+	memset(&io, 0, sizeof(io));
+
+	io.si_info	= &ipmi_kcs_si_info;
+	io.io_setup	= ipmi_ls2k_mem_setup;
+	io.addr_data	= pdev->resource[0].start;
+	io.regspacing	= resource_size(&pdev->resource[0]);
+	io.dev		= &pdev->dev;
+
+	dev_dbg(&pdev->dev, "addr 0x%lx, spacing %d.\n", io.addr_data, io.regspacing);
+
+	return ipmi_si_add_smi(&io);
+}
+
+static void ipmi_ls2k_remove(struct platform_device *pdev)
+{
+	ipmi_si_remove_by_dev(&pdev->dev);
+}
+
+struct platform_driver ipmi_ls2k_platform_driver = {
+	.driver = {
+		.name = "ls2k-ipmi-si",
+	},
+	.probe	= ipmi_ls2k_probe,
+	.remove	= ipmi_ls2k_remove,
+};
+
+void ipmi_si_ls2k_init(void)
+{
+	platform_driver_register(&ipmi_ls2k_platform_driver);
+	ls2k_registered = true;
+}
+
+void ipmi_si_ls2k_shutdown(void)
+{
+	if (ls2k_registered)
+		platform_driver_unregister(&ipmi_ls2k_platform_driver);
+}
-- 
2.47.1

[PATCH v3 3/3] mfd: ls2kbmc: Add Loongson-2K BMC reset function support

[Binbin Zhou]

Since the display is a sub-function of the Loongson-2K BMC, when the
BMC reset, the entire BMC PCIe is disconnected, including the display
which is interrupted.

Quick overview of the entire LS2K BMC reset process:

There are two types of reset methods: soft reset (BMC-initiated reboot
of IPMI reset command) and BMC watchdog reset (watchdog timeout).

First, regardless of the method, an interrupt is generated (PCIe interrupt
for soft reset/GPIO interrupt for watchdog reset);

Second, during the interrupt process, the system enters bmc_reset_work,
clears the bus/IO/mem resources of the LS7A PCI-E bridge, waits for the BMC
reset to begin, then restores the parent device's PCI configuration space,
waits for the BMC reset to complete, and finally restores the BMC PCI
configuration space.

Display restoration occurs last.

Co-developed-by: Chong Qiao <qiaochong@loongson.cn>
Signed-off-by: Chong Qiao <qiaochong@loongson.cn>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
---
 drivers/mfd/ls2kbmc-mfd.c | 326 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 326 insertions(+)

diff --git a/drivers/mfd/ls2kbmc-mfd.c b/drivers/mfd/ls2kbmc-mfd.c
index 9dbcb5b371f9..d6e5676ad0ab 100644
--- a/drivers/mfd/ls2kbmc-mfd.c
+++ b/drivers/mfd/ls2kbmc-mfd.c
@@ -10,8 +10,12 @@
  */
 
 #include <linux/aperture.h>
+#include <linux/bitfield.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/init.h>
+#include <linux/iopoll.h>
+#include <linux/kbd_kern.h>
 #include <linux/kernel.h>
 #include <linux/mfd/core.h>
 #include <linux/module.h>
@@ -19,6 +23,8 @@
 #include <linux/pci_ids.h>
 #include <linux/platform_data/simplefb.h>
 #include <linux/platform_device.h>
+#include <linux/stop_machine.h>
+#include <linux/vt_kern.h>
 
 /* LS2K BMC resources */
 #define LS2K_DISPLAY_RES_START		(SZ_16M + SZ_2M)
@@ -29,6 +35,44 @@
 #define LS2K_IPMI3_RES_START		(LS2K_IPMI2_RES_START + LS2K_IPMI_RES_SIZE)
 #define LS2K_IPMI4_RES_START		(LS2K_IPMI3_RES_START + LS2K_IPMI_RES_SIZE)
 
+#define LS7A_PCI_CFG_SIZE		0x100
+
+/* LS7A bridge registers */
+#define LS7A_PCIE_PORT_CTL0		0x0
+#define LS7A_PCIE_PORT_STS1		0xC
+#define LS7A_GEN2_CTL			0x80C
+#define LS7A_SYMBOL_TIMER		0x71C
+
+/* Bits of LS7A_PCIE_PORT_CTL0 */
+#define LS2K_BMC_PCIE_LTSSM_ENABLE	BIT(3)
+
+/* Bits of LS7A_PCIE_PORT_STS1 */
+#define LS2K_BMC_PCIE_LTSSM_STS		GENMASK(5, 0)
+
+/* Bits of LS7A_GEN2_CTL */
+#define LS7A_GEN2_SPEED_CHANG		BIT(17)
+#define LS7A_CONF_PHY_TX		BIT(18)
+
+/* Bits of LS7A_SYMBOL_TIMER */
+#define LS7A_MASK_LEN_MATCH		BIT(26)
+
+/* Interval between interruptions */
+#define LS2K_BMC_INT_INTERVAL		(60 * HZ)
+
+/* Maximum time to wait for U-Boot and DDR config to be ready with ms. */
+#define LS2K_BMC_RESET_WAIT_TIME	10000
+
+/* It's an experience value */
+#define LS7A_BAR0_CHECK_MAX_TIMES	2000
+
+#define LS2K_BMC_RESET_GPIO		14
+#define LOONGSON_GPIO_REG_BASE		0x1fe00500
+#define LOONGSON_GPIO_REG_SIZE		0x18
+#define LOONGSON_GPIO_OEN		0x0
+#define LOONGSON_GPIO_FUNC		0x4
+#define LOONGSON_GPIO_INTPOL		0x10
+#define LOONGSON_GPIO_INTEN		0x14
+
 static struct resource ls2k_display_resources[] = {
 	DEFINE_RES_MEM_NAMED(LS2K_DISPLAY_RES_START, SZ_4M, "simpledrm-res"),
 };
@@ -62,6 +106,275 @@ static struct mfd_cell ls2k_bmc_cells[] = {
 	MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi4_resources),
 };
 
+/* Index of the bridge PCI configuration space to be restored at BMC reset. */
+struct ls2k_bmc_bridge_pci_data {
+	u32 pci_command;
+	u32 base_address[6];
+	u32 rom_addreess;
+	u32 interrupt_line;
+	u32 msi_hi;
+	u32 msi_lo;
+	u32 devctl;
+	u32 linkcap;
+	u32 linkctl_sts;
+	u32 symbol_timer;
+	u32 gen2_ctrl;
+};
+
+/* Index of the BMC PCI configuration space to be restored at BMC reset. */
+struct ls2k_bmc_pci_data {
+	u32 pci_command;
+	u32 base_address0;
+	u32 interrupt_line;
+};
+
+struct ls2k_bmc_pdata {
+	struct device *dev;
+	struct work_struct bmc_reset_work;
+	struct ls2k_bmc_bridge_pci_data bridge_pci_data;
+	struct ls2k_bmc_pci_data bmc_pci_data;
+};
+
+static bool ls2k_bmc_bar0_addr_is_set(struct pci_dev *ppdev)
+{
+	u32 addr;
+
+	pci_read_config_dword(ppdev, PCI_BASE_ADDRESS_0, &addr);
+
+	return addr & PCI_BASE_ADDRESS_MEM_MASK ? true : false;
+}
+
+static bool ls2k_bmc_check_pcie_connected(struct pci_dev *parent,
+					  struct ls2k_bmc_pdata *priv)
+{
+	void __iomem *base;
+	int sts, ret;
+
+	base = pci_iomap(parent, 0, LS7A_PCI_CFG_SIZE);
+	if (!base)
+		return false;
+
+	writel(readl(base + LS7A_PCIE_PORT_CTL0) | LS2K_BMC_PCIE_LTSSM_ENABLE,
+	       base + LS7A_PCIE_PORT_CTL0);
+
+	ret = readl_poll_timeout_atomic(base + LS7A_PCIE_PORT_STS1, sts,
+					(sts & LS2K_BMC_PCIE_LTSSM_STS) == 0x11,
+					1000, 1000000);
+	if (ret) {
+		pci_iounmap(parent, base);
+		dev_err(priv->dev, "PCIE train failed status=0x%x\n", sts);
+		return false;
+	}
+
+	pci_iounmap(parent, base);
+	return true;
+}
+
+static void ls2k_bmc_restore_bridge_pci_data(struct pci_dev *parent, struct ls2k_bmc_pdata *priv)
+{
+	int base, i = 0;
+
+	pci_write_config_dword(parent, PCI_COMMAND, priv->bridge_pci_data.pci_command);
+
+	for (base = PCI_BASE_ADDRESS_0; base <= PCI_BASE_ADDRESS_5; base += 4, i++)
+		pci_write_config_dword(parent, base, priv->bridge_pci_data.base_address[i]);
+
+	pci_write_config_dword(parent, PCI_ROM_ADDRESS, priv->bridge_pci_data.rom_addreess);
+	pci_write_config_dword(parent, PCI_INTERRUPT_LINE, priv->bridge_pci_data.interrupt_line);
+
+	pci_write_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_LO,
+			       priv->bridge_pci_data.msi_lo);
+	pci_write_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_HI,
+			       priv->bridge_pci_data.msi_hi);
+	pci_write_config_dword(parent, parent->pcie_cap + PCI_EXP_DEVCTL,
+			       priv->bridge_pci_data.devctl);
+	pci_write_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCAP,
+			       priv->bridge_pci_data.linkcap);
+	pci_write_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCTL,
+			       priv->bridge_pci_data.linkctl_sts);
+
+	pci_write_config_dword(parent, LS7A_GEN2_CTL, priv->bridge_pci_data.gen2_ctrl);
+	pci_write_config_dword(parent, LS7A_SYMBOL_TIMER, priv->bridge_pci_data.symbol_timer);
+}
+
+static int ls2k_bmc_recover_pci_data(void *data)
+{
+	struct ls2k_bmc_pdata *priv = data;
+	struct pci_dev *pdev = to_pci_dev(priv->dev);
+	struct pci_dev *parent = pdev->bus->self;
+	u32 i;
+
+	/*
+	 * Clear the bus, io and mem resources of the PCI-E bridge to zero, so that
+	 * the processor can not access the LS2K PCI-E port, to avoid crashing due to
+	 * the lack of return signal from accessing the LS2K PCI-E port.
+	 */
+	pci_write_config_dword(parent, PCI_BASE_ADDRESS_2, 0);
+	pci_write_config_dword(parent, PCI_BASE_ADDRESS_3, 0);
+	pci_write_config_dword(parent, PCI_BASE_ADDRESS_4, 0);
+
+	/*
+	 * When the LS2K BMC is reset, the LS7A PCI-E port is also reset, and its PCI
+	 * BAR0 register is cleared. Due to the time gap between the GPIO interrupt
+	 * generation and the LS2K BMC reset, the LS7A PCI BAR0 register is read to
+	 * determine whether the reset has begun.
+	 */
+	for (i = LS7A_BAR0_CHECK_MAX_TIMES; i > 0 ; i--) {
+		if (!ls2k_bmc_bar0_addr_is_set(parent))
+			break;
+		mdelay(1);
+	};
+
+	if (i == 0)
+		return false;
+
+	ls2k_bmc_restore_bridge_pci_data(parent, priv);
+
+	/* Check if PCI-E is connected */
+	if (!ls2k_bmc_check_pcie_connected(parent, priv))
+		return false;
+
+	/* Waiting for U-Boot and DDR config ready */
+	mdelay(LS2K_BMC_RESET_WAIT_TIME);
+	if (!ls2k_bmc_bar0_addr_is_set(parent))
+		return false;
+
+	/* Restore LS2K BMC pci config data */
+	pci_write_config_dword(pdev, PCI_COMMAND, priv->bmc_pci_data.pci_command);
+	pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, priv->bmc_pci_data.base_address0);
+	pci_write_config_dword(pdev, PCI_INTERRUPT_LINE, priv->bmc_pci_data.interrupt_line);
+
+	return 0;
+}
+
+static void ls2k_bmc_events_fn(struct work_struct *work)
+{
+	struct ls2k_bmc_pdata *priv = container_of(work, struct ls2k_bmc_pdata, bmc_reset_work);
+
+	/*
+	 * The pcie is lost when the BMC resets, at which point access to the pcie
+	 * from other CPUs is suspended to prevent a crash.
+	 */
+	stop_machine(ls2k_bmc_recover_pci_data, priv, NULL);
+
+#ifdef CONFIG_VT
+	/* Re-push the display due to previous pcie loss. */
+	set_console(vt_move_to_console(MAX_NR_CONSOLES - 1, 1));
+#endif
+}
+
+static irqreturn_t ls2k_bmc_interrupt(int irq, void *arg)
+{
+	struct ls2k_bmc_pdata *priv = arg;
+	static unsigned long last_jiffies;
+
+	if (system_state != SYSTEM_RUNNING)
+		return IRQ_HANDLED;
+
+	/* Skip interrupt in LS2K_BMC_INT_INTERVAL */
+	if (time_after(jiffies, last_jiffies + LS2K_BMC_INT_INTERVAL)) {
+		schedule_work(&priv->bmc_reset_work);
+		last_jiffies = jiffies;
+	}
+
+	return IRQ_HANDLED;
+}
+
+/*
+ * Saves the BMC parent device (LS7A) and its own PCI configuration space registers
+ * that need to be restored after BMC reset.
+ */
+static void ls2k_bmc_save_pci_data(struct pci_dev *pdev, struct ls2k_bmc_pdata *priv)
+{
+	struct pci_dev *parent = pdev->bus->self;
+	int base, i = 0;
+
+	pci_read_config_dword(parent, PCI_COMMAND, &priv->bridge_pci_data.pci_command);
+
+	for (base = PCI_BASE_ADDRESS_0; base <= PCI_BASE_ADDRESS_5; base += 4, i++)
+		pci_read_config_dword(parent, base, &priv->bridge_pci_data.base_address[i]);
+
+	pci_read_config_dword(parent, PCI_ROM_ADDRESS, &priv->bridge_pci_data.rom_addreess);
+	pci_read_config_dword(parent, PCI_INTERRUPT_LINE, &priv->bridge_pci_data.interrupt_line);
+
+	pci_read_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_LO,
+			      &priv->bridge_pci_data.msi_lo);
+	pci_read_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_HI,
+			      &priv->bridge_pci_data.msi_hi);
+
+	pci_read_config_dword(parent, parent->pcie_cap + PCI_EXP_DEVCTL,
+			      &priv->bridge_pci_data.devctl);
+	pci_read_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCAP,
+			      &priv->bridge_pci_data.linkcap);
+	pci_read_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCTL,
+			      &priv->bridge_pci_data.linkctl_sts);
+
+	pci_read_config_dword(parent, LS7A_GEN2_CTL, &priv->bridge_pci_data.gen2_ctrl);
+	priv->bridge_pci_data.gen2_ctrl |= FIELD_PREP(LS7A_GEN2_SPEED_CHANG, 0x1)
+					 | FIELD_PREP(LS7A_CONF_PHY_TX, 0x0);
+
+	pci_read_config_dword(parent, LS7A_SYMBOL_TIMER, &priv->bridge_pci_data.symbol_timer);
+	priv->bridge_pci_data.symbol_timer |= LS7A_MASK_LEN_MATCH;
+
+	pci_read_config_dword(pdev, PCI_COMMAND, &priv->bmc_pci_data.pci_command);
+	pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &priv->bmc_pci_data.base_address0);
+	pci_read_config_dword(pdev, PCI_INTERRUPT_LINE, &priv->bmc_pci_data.interrupt_line);
+}
+
+static int ls2k_bmc_pdata_initial(struct pci_dev *pdev, struct ls2k_bmc_pdata *priv)
+{
+	int gsi = 16 + (LS2K_BMC_RESET_GPIO & 7);
+	void __iomem *gpio_base;
+	int irq, ret;
+
+	ls2k_bmc_save_pci_data(pdev, priv);
+
+	INIT_WORK(&priv->bmc_reset_work, ls2k_bmc_events_fn);
+
+	ret = devm_request_irq(&pdev->dev, pdev->irq, ls2k_bmc_interrupt,
+			       IRQF_SHARED | IRQF_TRIGGER_FALLING, "ls2kbmc pcie", priv);
+	if (ret) {
+		dev_err(priv->dev, "LS2KBMC PCI-E request_irq(%d) failed\n", pdev->irq);
+		return ret;
+	}
+
+	/*
+	 * Since Loongson-3 hardware does not support GPIO interrupt cascade,
+	 * chip->gpio_to_irq() cannot be implemented, here acpi_register_gsi() is used
+	 * to get gpio irq.
+	 * The gpio interrupt is a watchdog interrupt that is triggered when the BMC resets.
+	 */
+	irq = acpi_register_gsi(NULL, gsi, ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_LOW);
+	if (irq < 0)
+		return irq;
+
+	gpio_base = ioremap(LOONGSON_GPIO_REG_BASE, LOONGSON_GPIO_REG_SIZE);
+	if (!gpio_base) {
+		ret = PTR_ERR(gpio_base);
+		goto acpi_failed;
+	}
+
+	writel(readl(gpio_base + LOONGSON_GPIO_OEN) | BIT(LS2K_BMC_RESET_GPIO),
+	       gpio_base + LOONGSON_GPIO_OEN);
+	writel(readl(gpio_base + LOONGSON_GPIO_FUNC) & ~BIT(LS2K_BMC_RESET_GPIO),
+	       gpio_base + LOONGSON_GPIO_FUNC);
+	writel(readl(gpio_base + LOONGSON_GPIO_INTPOL) & ~BIT(LS2K_BMC_RESET_GPIO),
+	       gpio_base + LOONGSON_GPIO_INTPOL);
+	writel(readl(gpio_base + LOONGSON_GPIO_INTEN) | BIT(LS2K_BMC_RESET_GPIO),
+	       gpio_base + LOONGSON_GPIO_INTEN);
+
+	ret = devm_request_irq(priv->dev, irq, ls2k_bmc_interrupt,
+			       IRQF_SHARED | IRQF_TRIGGER_FALLING, "ls2kbmc gpio", priv);
+	if (ret)
+		dev_err(priv->dev, "LS2KBMC GPIO request_irq(%d) failed\n", irq);
+
+	iounmap(gpio_base);
+
+acpi_failed:
+	acpi_unregister_gsi(gsi);
+	return ret;
+}
+
 /*
  * Currently the Loongson-2K BMC hardware does not have an I2C interface to adapt to the
  * resolution. We set the resolution by presetting "video=1280x1024-16@2M" to the BMC memory.
@@ -101,6 +414,7 @@ static int ls2k_bmc_parse_mode(struct pci_dev *pdev, struct simplefb_platform_da
 static int ls2k_bmc_probe(struct pci_dev *dev, const struct pci_device_id *id)
 {
 	struct simplefb_platform_data pd;
+	struct ls2k_bmc_pdata *priv;
 	resource_size_t base;
 	int ret;
 
@@ -108,6 +422,18 @@ static int ls2k_bmc_probe(struct pci_dev *dev, const struct pci_device_id *id)
 	if (ret)
 		return ret;
 
+	priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
+	if (IS_ERR(priv)) {
+		ret = -ENOMEM;
+		goto disable_pci;
+	}
+
+	priv->dev = &dev->dev;
+
+	ret = ls2k_bmc_pdata_initial(dev, priv);
+	if (ret)
+		goto disable_pci;
+
 	ret = ls2k_bmc_parse_mode(dev, &pd);
 	if (ret)
 		goto disable_pci;
-- 
2.47.1

Re: [PATCH v3 2/3] ipmi: Add Loongson-2K BMC support

[kernel test robot]

Hi Binbin,

kernel test robot noticed the following build errors:

[auto build test ERROR on 08effa6b77f7dbb4727f811daef0f6085c0d63c8]

url:    https://github.com/intel-lab-lkp/linux/commits/Binbin-Zhou/mfd-ls2kbmc-Introduce-Loongson-2K-BMC-core-driver/20250529-202628
base:   08effa6b77f7dbb4727f811daef0f6085c0d63c8
patch link:    https://lore.kernel.org/r/01805f8d1b9c8e6564a2d6d83964f78ed29b8f1f.1748505446.git.zhoubinbin%40loongson.cn
patch subject: [PATCH v3 2/3] ipmi: Add Loongson-2K BMC support
config: loongarch-allmodconfig (https://download.01.org/0day-ci/archive/20250531/202505312022.QmFmGE1F-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250531/202505312022.QmFmGE1F-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505312022.QmFmGE1F-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/char/ipmi/ipmi_si_ls2k.c:180:6: error: redefinition of 'ipmi_si_ls2k_init'
     180 | void ipmi_si_ls2k_init(void)
         |      ^~~~~~~~~~~~~~~~~
   In file included from drivers/char/ipmi/ipmi_si_ls2k.c:17:
   drivers/char/ipmi/ipmi_si.h:108:20: note: previous definition of 'ipmi_si_ls2k_init' with type 'void(void)'
     108 | static inline void ipmi_si_ls2k_init(void) { }
         |                    ^~~~~~~~~~~~~~~~~
>> drivers/char/ipmi/ipmi_si_ls2k.c:186:6: error: redefinition of 'ipmi_si_ls2k_shutdown'
     186 | void ipmi_si_ls2k_shutdown(void)
         |      ^~~~~~~~~~~~~~~~~~~~~
   drivers/char/ipmi/ipmi_si.h:109:20: note: previous definition of 'ipmi_si_ls2k_shutdown' with type 'void(void)'
     109 | static inline void ipmi_si_ls2k_shutdown(void) { }
         |                    ^~~~~~~~~~~~~~~~~~~~~


vim +/ipmi_si_ls2k_init +180 drivers/char/ipmi/ipmi_si_ls2k.c

   179	
 > 180	void ipmi_si_ls2k_init(void)
   181	{
   182		platform_driver_register(&ipmi_ls2k_platform_driver);
   183		ls2k_registered = true;
   184	}
   185	
 > 186	void ipmi_si_ls2k_shutdown(void)

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH v3 1/3] mfd: ls2kbmc: Introduce Loongson-2K BMC core driver

[Huacai Chen]

Hi, Binbin,

On Thu, May 29, 2025 at 8:23 PM Binbin Zhou <zhoubinbin@loongson.cn> wrote:
>
> The Loongson-2K Board Management Controller provides an PCIe interface
> to the host to access the feature implemented in the BMC.
>
> The BMC is assembled on a server similar to the server machine with
> Loongson-3C6000 CPUs. It supports multiple sub-devices like DRM.
Technically the BMC is not bound to Loongson-3C6000, so replace it
with Loongson-3, or a long list
"Loongson-3C5000/Loongson-3D5000/Loongson-3C6000/Loongson-3D6000".

>
> Co-developed-by: Chong Qiao <qiaochong@loongson.cn>
> Signed-off-by: Chong Qiao <qiaochong@loongson.cn>
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> ---
>  drivers/mfd/Kconfig       |  12 +++
>  drivers/mfd/Makefile      |   2 +
>  drivers/mfd/ls2kbmc-mfd.c | 156 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 170 insertions(+)
>  create mode 100644 drivers/mfd/ls2kbmc-mfd.c
>
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 22b936310039..4993b0708fe5 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -2422,5 +2422,17 @@ config MFD_UPBOARD_FPGA
>           To compile this driver as a module, choose M here: the module will be
>           called upboard-fpga.
>
> +config MFD_LS2K_BMC
> +       tristate "Loongson-2K Board Management Controller Support"
> +       depends on LOONGARCH
> +       default y if LOONGARCH
> +       select MFD_CORE
> +       help
> +         Say yes here to add support for the Loongson-2K BMC which is a Board
> +         Management Controller connected to the PCIe bus. The device supports
> +         multiple sub-devices like DRM. This driver provides common support for
like DRM and IPMI?

> +         accessing the devices; additional drivers must be enabled in order to
> +         use the functionality of the BMC device.
And moving this block after MFD_INTEL_M10_BMC_PMCI is a little better
(BMC drivers are together).

> +
>  endmenu
>  endif
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 948cbdf42a18..18960ea13b64 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -290,3 +290,5 @@ obj-$(CONFIG_MFD_RSMU_I2C)  += rsmu_i2c.o rsmu_core.o
>  obj-$(CONFIG_MFD_RSMU_SPI)     += rsmu_spi.o rsmu_core.o
>
>  obj-$(CONFIG_MFD_UPBOARD_FPGA) += upboard-fpga.o
> +
> +obj-$(CONFIG_MFD_LS2K_BMC)     += ls2kbmc-mfd.o
Also move it after MFD_INTEL_M10_BMC_PMCI.

Huacai

> diff --git a/drivers/mfd/ls2kbmc-mfd.c b/drivers/mfd/ls2kbmc-mfd.c
> new file mode 100644
> index 000000000000..9dbcb5b371f9
> --- /dev/null
> +++ b/drivers/mfd/ls2kbmc-mfd.c
> @@ -0,0 +1,156 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Loongson-2K Board Management Controller (BMC) Core Driver.
> + *
> + * Copyright (C) 2024-2025 Loongson Technology Corporation Limited.
> + *
> + * Authors:
> + *     Chong Qiao <qiaochong@loongson.cn>
> + *     Binbin Zhou <zhoubinbin@loongson.cn>
> + */
> +
> +#include <linux/aperture.h>
> +#include <linux/errno.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/mfd/core.h>
> +#include <linux/module.h>
> +#include <linux/pci.h>
> +#include <linux/pci_ids.h>
> +#include <linux/platform_data/simplefb.h>
> +#include <linux/platform_device.h>
> +
> +/* LS2K BMC resources */
> +#define LS2K_DISPLAY_RES_START         (SZ_16M + SZ_2M)
> +#define LS2K_IPMI_RES_SIZE             0x1C
> +#define LS2K_IPMI0_RES_START           (SZ_16M + 0xF00000)
> +#define LS2K_IPMI1_RES_START           (LS2K_IPMI0_RES_START + LS2K_IPMI_RES_SIZE)
> +#define LS2K_IPMI2_RES_START           (LS2K_IPMI1_RES_START + LS2K_IPMI_RES_SIZE)
> +#define LS2K_IPMI3_RES_START           (LS2K_IPMI2_RES_START + LS2K_IPMI_RES_SIZE)
> +#define LS2K_IPMI4_RES_START           (LS2K_IPMI3_RES_START + LS2K_IPMI_RES_SIZE)
> +
> +static struct resource ls2k_display_resources[] = {
> +       DEFINE_RES_MEM_NAMED(LS2K_DISPLAY_RES_START, SZ_4M, "simpledrm-res"),
> +};
> +
> +static struct resource ls2k_ipmi0_resources[] = {
> +       DEFINE_RES_MEM_NAMED(LS2K_IPMI0_RES_START, LS2K_IPMI_RES_SIZE, "ipmi0-res"),
> +};
> +
> +static struct resource ls2k_ipmi1_resources[] = {
> +       DEFINE_RES_MEM_NAMED(LS2K_IPMI1_RES_START, LS2K_IPMI_RES_SIZE, "ipmi1-res"),
> +};
> +
> +static struct resource ls2k_ipmi2_resources[] = {
> +       DEFINE_RES_MEM_NAMED(LS2K_IPMI2_RES_START, LS2K_IPMI_RES_SIZE, "ipmi2-res"),
> +};
> +
> +static struct resource ls2k_ipmi3_resources[] = {
> +       DEFINE_RES_MEM_NAMED(LS2K_IPMI3_RES_START, LS2K_IPMI_RES_SIZE, "ipmi3-res"),
> +};
> +
> +static struct resource ls2k_ipmi4_resources[] = {
> +       DEFINE_RES_MEM_NAMED(LS2K_IPMI4_RES_START, LS2K_IPMI_RES_SIZE, "ipmi4-res"),
> +};
> +
> +static struct mfd_cell ls2k_bmc_cells[] = {
> +       MFD_CELL_RES("simple-framebuffer", ls2k_display_resources),
> +       MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi0_resources),
> +       MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi1_resources),
> +       MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi2_resources),
> +       MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi3_resources),
> +       MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi4_resources),
> +};
> +
> +/*
> + * Currently the Loongson-2K BMC hardware does not have an I2C interface to adapt to the
> + * resolution. We set the resolution by presetting "video=1280x1024-16@2M" to the BMC memory.
> + */
> +static int ls2k_bmc_parse_mode(struct pci_dev *pdev, struct simplefb_platform_data *pd)
> +{
> +       char *mode;
> +       int depth, ret;
> +
> +       /* The last 16M of PCI BAR0 is used to store the resolution string. */
> +       mode = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0) + SZ_16M, SZ_16M);
> +       if (!mode)
> +               return -ENOMEM;
> +
> +       /* The resolution field starts with the flag "video=". */
> +       if (!strncmp(mode, "video=", 6))
> +               mode = mode + 6;
> +
> +       ret = kstrtoint(strsep(&mode, "x"), 10, &pd->width);
> +       if (ret)
> +               return ret;
> +
> +       ret = kstrtoint(strsep(&mode, "-"), 10, &pd->height);
> +       if (ret)
> +               return ret;
> +
> +       ret = kstrtoint(strsep(&mode, "@"), 10, &depth);
> +       if (ret)
> +               return ret;
> +
> +       pd->stride = pd->width * depth / 8;
> +       pd->format = depth == 32 ? "a8r8g8b8" : "r5g6b5";
> +
> +       return 0;
> +}
> +
> +static int ls2k_bmc_probe(struct pci_dev *dev, const struct pci_device_id *id)
> +{
> +       struct simplefb_platform_data pd;
> +       resource_size_t base;
> +       int ret;
> +
> +       ret = pci_enable_device(dev);
> +       if (ret)
> +               return ret;
> +
> +       ret = ls2k_bmc_parse_mode(dev, &pd);
> +       if (ret)
> +               goto disable_pci;
> +
> +       ls2k_bmc_cells[0].platform_data = &pd;
> +       ls2k_bmc_cells[0].pdata_size = sizeof(pd);
> +       base = dev->resource[0].start + LS2K_DISPLAY_RES_START;
> +
> +       /* Remove conflicting efifb device */
> +       ret = aperture_remove_conflicting_devices(base, SZ_4M, "simple-framebuffer");
> +       if (ret) {
> +               dev_err(&dev->dev, "Failed to removed firmware framebuffers: %d\n", ret);
> +               goto disable_pci;
> +       }
> +
> +       return devm_mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO,
> +                                   ls2k_bmc_cells, ARRAY_SIZE(ls2k_bmc_cells),
> +                                   &dev->resource[0], 0, NULL);
> +
> +disable_pci:
> +       pci_disable_device(dev);
> +       return ret;
> +}
> +
> +static void ls2k_bmc_remove(struct pci_dev *dev)
> +{
> +       pci_disable_device(dev);
> +}
> +
> +static struct pci_device_id ls2k_bmc_devices[] = {
> +       { PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, 0x1a05) },
> +       { }
> +};
> +MODULE_DEVICE_TABLE(pci, ls2k_bmc_devices);
> +
> +static struct pci_driver ls2k_bmc_driver = {
> +       .name = "ls2k-bmc",
> +       .id_table = ls2k_bmc_devices,
> +       .probe = ls2k_bmc_probe,
> +       .remove = ls2k_bmc_remove,
> +};
> +module_pci_driver(ls2k_bmc_driver);
> +
> +MODULE_DESCRIPTION("Loongson-2K BMC driver");
> +MODULE_AUTHOR("Loongson Technology Corporation Limited");
> +MODULE_LICENSE("GPL");
> --
> 2.47.1
>
>

Re: [PATCH v3 2/3] ipmi: Add Loongson-2K BMC support

[Huacai Chen]

Hi, Binbin,

On Thu, May 29, 2025 at 8:23 PM Binbin Zhou <zhoubinbin@loongson.cn> wrote:
>
> This patch adds Loongson-2K BMC IPMI support.
>
> According to the existing design, we use software simulation to
> implement the KCS interface registers: Stauts/Command/Data_Out/Data_In.
>
> Also since both host side and BMC side read and write kcs status, fifo flag
> is used to ensure data consistency.
>
> The single KCS message block is as follows:
>
> +-------------------------------------------------------------------------+
> |FIFO flags| KCS register data | CMD data | KCS version | WR REQ | WR ACK |
> +-------------------------------------------------------------------------+
>
> Co-developed-by: Chong Qiao <qiaochong@loongson.cn>
> Signed-off-by: Chong Qiao <qiaochong@loongson.cn>
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> ---
>  drivers/char/ipmi/Makefile       |   1 +
>  drivers/char/ipmi/ipmi_si.h      |   7 ++
>  drivers/char/ipmi/ipmi_si_intf.c |   3 +
>  drivers/char/ipmi/ipmi_si_ls2k.c | 190 +++++++++++++++++++++++++++++++
>  4 files changed, 201 insertions(+)
>  create mode 100644 drivers/char/ipmi/ipmi_si_ls2k.c
>
> diff --git a/drivers/char/ipmi/Makefile b/drivers/char/ipmi/Makefile
> index e0944547c9d0..17308dd6be20 100644
> --- a/drivers/char/ipmi/Makefile
> +++ b/drivers/char/ipmi/Makefile
> @@ -8,6 +8,7 @@ ipmi_si-y := ipmi_si_intf.o ipmi_kcs_sm.o ipmi_smic_sm.o ipmi_bt_sm.o \
>         ipmi_si_mem_io.o
>  ipmi_si-$(CONFIG_HAS_IOPORT) += ipmi_si_port_io.o
>  ipmi_si-$(CONFIG_PCI) += ipmi_si_pci.o
> +ipmi_si-$(CONFIG_MFD_LS2K_BMC) += ipmi_si_ls2k.o
>  ipmi_si-$(CONFIG_PARISC) += ipmi_si_parisc.o
>
>  obj-$(CONFIG_IPMI_HANDLER) += ipmi_msghandler.o
> diff --git a/drivers/char/ipmi/ipmi_si.h b/drivers/char/ipmi/ipmi_si.h
> index 508c3fd45877..f38ea4f4c891 100644
> --- a/drivers/char/ipmi/ipmi_si.h
> +++ b/drivers/char/ipmi/ipmi_si.h
> @@ -101,6 +101,13 @@ void ipmi_si_pci_shutdown(void);
>  static inline void ipmi_si_pci_init(void) { }
>  static inline void ipmi_si_pci_shutdown(void) { }
>  #endif
> +#ifdef CONFIG_MFD_LS2K_BMC
> +void ipmi_si_ls2k_init(void);
> +void ipmi_si_ls2k_shutdown(void);
> +#else
> +static inline void ipmi_si_ls2k_init(void) { }
> +static inline void ipmi_si_ls2k_shutdown(void) { }
> +#endif
>  #ifdef CONFIG_PARISC
>  void ipmi_si_parisc_init(void);
>  void ipmi_si_parisc_shutdown(void);
> diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
> index 7fe891783a37..c13d5132fffc 100644
> --- a/drivers/char/ipmi/ipmi_si_intf.c
> +++ b/drivers/char/ipmi/ipmi_si_intf.c
> @@ -2120,6 +2120,7 @@ static int __init init_ipmi_si(void)
>
>         ipmi_si_pci_init();
>
> +       ipmi_si_ls2k_init();
>         ipmi_si_parisc_init();
>
>         mutex_lock(&smi_infos_lock);
> @@ -2334,6 +2335,8 @@ static void cleanup_ipmi_si(void)
>
>         ipmi_si_pci_shutdown();
>
> +       ipmi_si_ls2k_shutdown();
> +
>         ipmi_si_parisc_shutdown();
>
>         ipmi_si_platform_shutdown();
> diff --git a/drivers/char/ipmi/ipmi_si_ls2k.c b/drivers/char/ipmi/ipmi_si_ls2k.c
> new file mode 100644
> index 000000000000..71159e9882b7
> --- /dev/null
> +++ b/drivers/char/ipmi/ipmi_si_ls2k.c
> @@ -0,0 +1,190 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Driver for Loongson-2K BMC IPMI
> + *
> + * Copyright (C) 2024-2025 Loongson Technology Corporation Limited.
> + *
> + * Authors:
> + *     Chong Qiao <qiaochong@loongson.cn>
> + *     Binbin Zhou <zhoubinbin@loongson.cn>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/ioport.h>
> +#include <linux/module.h>
> +#include <linux/types.h>
> +
> +#include "ipmi_si.h"
> +
> +#define LS2K_KCS_FIFO_IBFH     0x0
> +#define LS2K_KCS_FIFO_IBFT     0x1
> +#define LS2K_KCS_FIFO_OBFH     0x2
> +#define LS2K_KCS_FIFO_OBFT     0x3
> +
> +/* KCS registers */
> +#define LS2K_KCS_REG_STS       0x4
> +#define LS2K_KCS_REG_DATA_OUT  0x5
> +#define LS2K_KCS_REG_DATA_IN   0x6
> +#define LS2K_KCS_REG_CMD       0x8
> +
> +#define LS2K_KCS_CMD_DATA      0xa
> +#define LS2K_KCS_VERSION       0xb
> +#define LS2K_KCS_WR_REQ                0xc
> +#define LS2K_KCS_WR_ACK                0x10
> +
> +#define LS2K_KCS_STS_OBF       BIT(0)
> +#define LS2K_KCS_STS_IBF       BIT(1)
> +#define LS2K_KCS_STS_SMS_ATN   BIT(2)
> +#define LS2K_KCS_STS_CMD       BIT(3)
> +
> +#define LS2K_KCS_DATA_MASK     (LS2K_KCS_STS_OBF | LS2K_KCS_STS_IBF | LS2K_KCS_STS_CMD)
> +
> +static bool ls2k_registered;
> +
> +static unsigned char ls2k_mem_inb_v0(const struct si_sm_io *io, unsigned int offset)
> +{
> +       void __iomem *addr = io->addr;
> +       int reg_offset;
> +
> +       if (offset & BIT(0)) {
> +               reg_offset = LS2K_KCS_REG_STS;
> +       } else {
> +               writeb(readb(addr + LS2K_KCS_REG_STS) & ~LS2K_KCS_STS_OBF,
> +                      addr + LS2K_KCS_REG_STS);
Newline is unnecessary here.

Huacai

> +               reg_offset = LS2K_KCS_REG_DATA_OUT;
> +       }
> +
> +       return readb(addr + reg_offset);
> +}
> +
> +static unsigned char ls2k_mem_inb_v1(const struct si_sm_io *io, unsigned int offset)
> +{
> +       void __iomem *addr = io->addr;
> +       unsigned char inb = 0, cmd;
> +       bool obf, ibf;
> +
> +       obf = readb(addr + LS2K_KCS_FIFO_OBFH) ^ readb(addr + LS2K_KCS_FIFO_OBFT);
> +       ibf = readb(addr + LS2K_KCS_FIFO_IBFH) ^ readb(addr + LS2K_KCS_FIFO_IBFT);
> +       cmd = readb(addr + LS2K_KCS_CMD_DATA);
> +
> +       if (offset & BIT(0)) {
> +               inb = readb(addr + LS2K_KCS_REG_STS) & ~LS2K_KCS_DATA_MASK;
> +               inb |= FIELD_PREP(LS2K_KCS_STS_OBF, obf)
> +                   | FIELD_PREP(LS2K_KCS_STS_IBF, ibf)
> +                   | FIELD_PREP(LS2K_KCS_STS_CMD, cmd);
> +       } else {
> +               inb = readb(addr + LS2K_KCS_REG_DATA_OUT);
> +               writeb(readb(addr + LS2K_KCS_FIFO_OBFH), addr + LS2K_KCS_FIFO_OBFT);
> +       }
> +
> +       return inb;
> +}
> +
> +static void ls2k_mem_outb_v0(const struct si_sm_io *io, unsigned int offset,
> +                            unsigned char val)
> +{
> +       void __iomem *addr = io->addr;
> +       unsigned char sts = readb(addr + LS2K_KCS_REG_STS);
> +       int reg_offset;
> +
> +       if (sts & LS2K_KCS_STS_IBF)
> +               return;
> +
> +       if (offset & BIT(0)) {
> +               reg_offset = LS2K_KCS_REG_CMD;
> +               sts |= LS2K_KCS_STS_CMD;
> +       } else {
> +               reg_offset = LS2K_KCS_REG_DATA_IN;
> +               sts &= ~LS2K_KCS_STS_CMD;
> +       }
> +
> +       writew(val, addr + reg_offset);
> +       writeb(sts | LS2K_KCS_STS_IBF, addr + LS2K_KCS_REG_STS);
> +       writel(readl(addr + LS2K_KCS_WR_REQ) + 1, addr + LS2K_KCS_WR_REQ);
> +}
> +
> +static void ls2k_mem_outb_v1(const struct si_sm_io *io, unsigned int offset,
> +                            unsigned char val)
> +{
> +       void __iomem *addr = io->addr;
> +       unsigned char ibfh, ibft;
> +       int reg_offset;
> +
> +       ibfh = readb(addr + LS2K_KCS_FIFO_IBFH);
> +       ibft = readb(addr + LS2K_KCS_FIFO_IBFT);
> +
> +       if (ibfh ^ ibft)
> +               return;
> +
> +       reg_offset = (offset & BIT(0)) ? LS2K_KCS_REG_CMD : LS2K_KCS_REG_DATA_IN;
> +       writew(val, addr + reg_offset);
> +
> +       writeb(offset & BIT(0), addr + LS2K_KCS_CMD_DATA);
> +       writeb(!ibft, addr + LS2K_KCS_FIFO_IBFH);
> +       writel(readl(addr + LS2K_KCS_WR_REQ) + 1, addr + LS2K_KCS_WR_REQ);
> +}
> +
> +static void ls2k_mem_cleanup(struct si_sm_io *io)
> +{
> +       if (io->addr)
> +               iounmap(io->addr);
> +}
> +
> +static int ipmi_ls2k_mem_setup(struct si_sm_io *io)
> +{
> +       unsigned char version;
> +
> +       io->addr = ioremap(io->addr_data, io->regspacing);
> +       if (!io->addr)
> +               return -EIO;
> +
> +       version = readb(io->addr + LS2K_KCS_VERSION);
> +
> +       io->inputb = version ? ls2k_mem_inb_v1 : ls2k_mem_inb_v0;
> +       io->outputb = version ? ls2k_mem_outb_v1 : ls2k_mem_outb_v0;
> +       io->io_cleanup = ls2k_mem_cleanup;
> +
> +       return 0;
> +}
> +
> +static int ipmi_ls2k_probe(struct platform_device *pdev)
> +{
> +       struct si_sm_io io;
> +
> +       memset(&io, 0, sizeof(io));
> +
> +       io.si_info      = &ipmi_kcs_si_info;
> +       io.io_setup     = ipmi_ls2k_mem_setup;
> +       io.addr_data    = pdev->resource[0].start;
> +       io.regspacing   = resource_size(&pdev->resource[0]);
> +       io.dev          = &pdev->dev;
> +
> +       dev_dbg(&pdev->dev, "addr 0x%lx, spacing %d.\n", io.addr_data, io.regspacing);
> +
> +       return ipmi_si_add_smi(&io);
> +}
> +
> +static void ipmi_ls2k_remove(struct platform_device *pdev)
> +{
> +       ipmi_si_remove_by_dev(&pdev->dev);
> +}
> +
> +struct platform_driver ipmi_ls2k_platform_driver = {
> +       .driver = {
> +               .name = "ls2k-ipmi-si",
> +       },
> +       .probe  = ipmi_ls2k_probe,
> +       .remove = ipmi_ls2k_remove,
> +};
> +
> +void ipmi_si_ls2k_init(void)
> +{
> +       platform_driver_register(&ipmi_ls2k_platform_driver);
> +       ls2k_registered = true;
> +}
> +
> +void ipmi_si_ls2k_shutdown(void)
> +{
> +       if (ls2k_registered)
> +               platform_driver_unregister(&ipmi_ls2k_platform_driver);
> +}
> --
> 2.47.1
>
>

Re: [PATCH v3 3/3] mfd: ls2kbmc: Add Loongson-2K BMC reset function support

[Huacai Chen]

Hi, Binbin,

On Thu, May 29, 2025 at 8:23 PM Binbin Zhou <zhoubinbin@loongson.cn> wrote:
>
> Since the display is a sub-function of the Loongson-2K BMC, when the
> BMC reset, the entire BMC PCIe is disconnected, including the display
> which is interrupted.
>
> Quick overview of the entire LS2K BMC reset process:
>
> There are two types of reset methods: soft reset (BMC-initiated reboot
> of IPMI reset command) and BMC watchdog reset (watchdog timeout).
>
> First, regardless of the method, an interrupt is generated (PCIe interrupt
> for soft reset/GPIO interrupt for watchdog reset);
>
> Second, during the interrupt process, the system enters bmc_reset_work,
> clears the bus/IO/mem resources of the LS7A PCI-E bridge, waits for the BMC
> reset to begin, then restores the parent device's PCI configuration space,
> waits for the BMC reset to complete, and finally restores the BMC PCI
> configuration space.
>
> Display restoration occurs last.
>
> Co-developed-by: Chong Qiao <qiaochong@loongson.cn>
> Signed-off-by: Chong Qiao <qiaochong@loongson.cn>
> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
> ---
>  drivers/mfd/ls2kbmc-mfd.c | 326 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 326 insertions(+)
>
> diff --git a/drivers/mfd/ls2kbmc-mfd.c b/drivers/mfd/ls2kbmc-mfd.c
> index 9dbcb5b371f9..d6e5676ad0ab 100644
> --- a/drivers/mfd/ls2kbmc-mfd.c
> +++ b/drivers/mfd/ls2kbmc-mfd.c
> @@ -10,8 +10,12 @@
>   */
>
>  #include <linux/aperture.h>
> +#include <linux/bitfield.h>
> +#include <linux/delay.h>
>  #include <linux/errno.h>
>  #include <linux/init.h>
> +#include <linux/iopoll.h>
> +#include <linux/kbd_kern.h>
>  #include <linux/kernel.h>
>  #include <linux/mfd/core.h>
>  #include <linux/module.h>
> @@ -19,6 +23,8 @@
>  #include <linux/pci_ids.h>
>  #include <linux/platform_data/simplefb.h>
>  #include <linux/platform_device.h>
> +#include <linux/stop_machine.h>
> +#include <linux/vt_kern.h>
>
>  /* LS2K BMC resources */
>  #define LS2K_DISPLAY_RES_START         (SZ_16M + SZ_2M)
> @@ -29,6 +35,44 @@
>  #define LS2K_IPMI3_RES_START           (LS2K_IPMI2_RES_START + LS2K_IPMI_RES_SIZE)
>  #define LS2K_IPMI4_RES_START           (LS2K_IPMI3_RES_START + LS2K_IPMI_RES_SIZE)
>
> +#define LS7A_PCI_CFG_SIZE              0x100
> +
> +/* LS7A bridge registers */
> +#define LS7A_PCIE_PORT_CTL0            0x0
> +#define LS7A_PCIE_PORT_STS1            0xC
> +#define LS7A_GEN2_CTL                  0x80C
> +#define LS7A_SYMBOL_TIMER              0x71C
> +
> +/* Bits of LS7A_PCIE_PORT_CTL0 */
> +#define LS2K_BMC_PCIE_LTSSM_ENABLE     BIT(3)
> +
> +/* Bits of LS7A_PCIE_PORT_STS1 */
> +#define LS2K_BMC_PCIE_LTSSM_STS                GENMASK(5, 0)
> +
> +/* Bits of LS7A_GEN2_CTL */
> +#define LS7A_GEN2_SPEED_CHANG          BIT(17)
> +#define LS7A_CONF_PHY_TX               BIT(18)
> +
> +/* Bits of LS7A_SYMBOL_TIMER */
> +#define LS7A_MASK_LEN_MATCH            BIT(26)
> +
> +/* Interval between interruptions */
> +#define LS2K_BMC_INT_INTERVAL          (60 * HZ)
> +
> +/* Maximum time to wait for U-Boot and DDR config to be ready with ms. */
> +#define LS2K_BMC_RESET_WAIT_TIME       10000
> +
> +/* It's an experience value */
> +#define LS7A_BAR0_CHECK_MAX_TIMES      2000
> +
> +#define LS2K_BMC_RESET_GPIO            14
> +#define LOONGSON_GPIO_REG_BASE         0x1fe00500
> +#define LOONGSON_GPIO_REG_SIZE         0x18
> +#define LOONGSON_GPIO_OEN              0x0
> +#define LOONGSON_GPIO_FUNC             0x4
> +#define LOONGSON_GPIO_INTPOL           0x10
> +#define LOONGSON_GPIO_INTEN            0x14
> +
>  static struct resource ls2k_display_resources[] = {
>         DEFINE_RES_MEM_NAMED(LS2K_DISPLAY_RES_START, SZ_4M, "simpledrm-res"),
>  };
> @@ -62,6 +106,275 @@ static struct mfd_cell ls2k_bmc_cells[] = {
>         MFD_CELL_RES("ls2k-ipmi-si", ls2k_ipmi4_resources),
>  };
>
> +/* Index of the bridge PCI configuration space to be restored at BMC reset. */
Replacing bridge with parent is a little better to understand.

> +struct ls2k_bmc_bridge_pci_data {
> +       u32 pci_command;
> +       u32 base_address[6];
> +       u32 rom_addreess;
> +       u32 interrupt_line;
> +       u32 msi_hi;
> +       u32 msi_lo;
> +       u32 devctl;
> +       u32 linkcap;
> +       u32 linkctl_sts;
> +       u32 symbol_timer;
> +       u32 gen2_ctrl;
> +};
And from simple to complex, I prefer move ls2k_bmc_bridge_pci_data
after ls2k_bmc_pci_data.

> +
> +/* Index of the BMC PCI configuration space to be restored at BMC reset. */
> +struct ls2k_bmc_pci_data {
> +       u32 pci_command;
> +       u32 base_address0;
> +       u32 interrupt_line;
> +};
> +
> +struct ls2k_bmc_pdata {
> +       struct device *dev;
> +       struct work_struct bmc_reset_work;
> +       struct ls2k_bmc_bridge_pci_data bridge_pci_data;
> +       struct ls2k_bmc_pci_data bmc_pci_data;
Also here.

> +};
> +
> +static bool ls2k_bmc_bar0_addr_is_set(struct pci_dev *ppdev)
> +{
> +       u32 addr;
> +
> +       pci_read_config_dword(ppdev, PCI_BASE_ADDRESS_0, &addr);
> +
> +       return addr & PCI_BASE_ADDRESS_MEM_MASK ? true : false;
> +}
> +
> +static bool ls2k_bmc_check_pcie_connected(struct pci_dev *parent,
> +                                         struct ls2k_bmc_pdata *priv)
Newline is unnecessary here. And rename the function to
ls2k_bmc_pcie_is_connected() can keep consistency with
ls2k_bmc_bar0_addr_is_set().

> +{
> +       void __iomem *base;
> +       int sts, ret;
> +
> +       base = pci_iomap(parent, 0, LS7A_PCI_CFG_SIZE);
> +       if (!base)
> +               return false;
> +
> +       writel(readl(base + LS7A_PCIE_PORT_CTL0) | LS2K_BMC_PCIE_LTSSM_ENABLE,
> +              base + LS7A_PCIE_PORT_CTL0);
Newline is unnecessary here.

> +
> +       ret = readl_poll_timeout_atomic(base + LS7A_PCIE_PORT_STS1, sts,
> +                                       (sts & LS2K_BMC_PCIE_LTSSM_STS) == 0x11,
> +                                       1000, 1000000);
Newline is unnecessary here.

> +       if (ret) {
> +               pci_iounmap(parent, base);
> +               dev_err(priv->dev, "PCIE train failed status=0x%x\n", sts);
> +               return false;
> +       }
> +
> +       pci_iounmap(parent, base);
> +       return true;
> +}
> +
> +static void ls2k_bmc_restore_bridge_pci_data(struct pci_dev *parent, struct ls2k_bmc_pdata *priv)
> +{
> +       int base, i = 0;
> +
> +       pci_write_config_dword(parent, PCI_COMMAND, priv->bridge_pci_data.pci_command);
> +
> +       for (base = PCI_BASE_ADDRESS_0; base <= PCI_BASE_ADDRESS_5; base += 4, i++)
> +               pci_write_config_dword(parent, base, priv->bridge_pci_data.base_address[i]);
> +
> +       pci_write_config_dword(parent, PCI_ROM_ADDRESS, priv->bridge_pci_data.rom_addreess);
> +       pci_write_config_dword(parent, PCI_INTERRUPT_LINE, priv->bridge_pci_data.interrupt_line);
> +
> +       pci_write_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_LO,
> +                              priv->bridge_pci_data.msi_lo);
> +       pci_write_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_HI,
> +                              priv->bridge_pci_data.msi_hi);
> +       pci_write_config_dword(parent, parent->pcie_cap + PCI_EXP_DEVCTL,
> +                              priv->bridge_pci_data.devctl);
> +       pci_write_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCAP,
> +                              priv->bridge_pci_data.linkcap);
> +       pci_write_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCTL,
> +                              priv->bridge_pci_data.linkctl_sts);
> +
> +       pci_write_config_dword(parent, LS7A_GEN2_CTL, priv->bridge_pci_data.gen2_ctrl);
> +       pci_write_config_dword(parent, LS7A_SYMBOL_TIMER, priv->bridge_pci_data.symbol_timer);
> +}
> +
> +static int ls2k_bmc_recover_pci_data(void *data)
> +{
> +       struct ls2k_bmc_pdata *priv = data;
> +       struct pci_dev *pdev = to_pci_dev(priv->dev);
> +       struct pci_dev *parent = pdev->bus->self;
> +       u32 i;
> +
> +       /*
> +        * Clear the bus, io and mem resources of the PCI-E bridge to zero, so that
> +        * the processor can not access the LS2K PCI-E port, to avoid crashing due to
> +        * the lack of return signal from accessing the LS2K PCI-E port.
> +        */
> +       pci_write_config_dword(parent, PCI_BASE_ADDRESS_2, 0);
> +       pci_write_config_dword(parent, PCI_BASE_ADDRESS_3, 0);
> +       pci_write_config_dword(parent, PCI_BASE_ADDRESS_4, 0);
> +
> +       /*
> +        * When the LS2K BMC is reset, the LS7A PCI-E port is also reset, and its PCI
> +        * BAR0 register is cleared. Due to the time gap between the GPIO interrupt
> +        * generation and the LS2K BMC reset, the LS7A PCI BAR0 register is read to
> +        * determine whether the reset has begun.
> +        */
> +       for (i = LS7A_BAR0_CHECK_MAX_TIMES; i > 0 ; i--) {
> +               if (!ls2k_bmc_bar0_addr_is_set(parent))
> +                       break;
> +               mdelay(1);
> +       };
> +
> +       if (i == 0)
> +               return false;
> +
> +       ls2k_bmc_restore_bridge_pci_data(parent, priv);
> +
> +       /* Check if PCI-E is connected */
> +       if (!ls2k_bmc_check_pcie_connected(parent, priv))
> +               return false;
> +
> +       /* Waiting for U-Boot and DDR config ready */
> +       mdelay(LS2K_BMC_RESET_WAIT_TIME);
> +       if (!ls2k_bmc_bar0_addr_is_set(parent))
> +               return false;
> +
> +       /* Restore LS2K BMC pci config data */
s/pci/PCI/g

> +       pci_write_config_dword(pdev, PCI_COMMAND, priv->bmc_pci_data.pci_command);
> +       pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, priv->bmc_pci_data.base_address0);
> +       pci_write_config_dword(pdev, PCI_INTERRUPT_LINE, priv->bmc_pci_data.interrupt_line);
> +
> +       return 0;
> +}
> +
> +static void ls2k_bmc_events_fn(struct work_struct *work)
> +{
> +       struct ls2k_bmc_pdata *priv = container_of(work, struct ls2k_bmc_pdata, bmc_reset_work);
> +
> +       /*
> +        * The pcie is lost when the BMC resets, at which point access to the pcie
s/pcie/PCI-E/g

> +        * from other CPUs is suspended to prevent a crash.
> +        */
> +       stop_machine(ls2k_bmc_recover_pci_data, priv, NULL);
> +
> +#ifdef CONFIG_VT
> +       /* Re-push the display due to previous pcie loss. */
> +       set_console(vt_move_to_console(MAX_NR_CONSOLES - 1, 1));
> +#endif
> +}
> +
> +static irqreturn_t ls2k_bmc_interrupt(int irq, void *arg)
> +{
> +       struct ls2k_bmc_pdata *priv = arg;
> +       static unsigned long last_jiffies;
> +
> +       if (system_state != SYSTEM_RUNNING)
> +               return IRQ_HANDLED;
> +
> +       /* Skip interrupt in LS2K_BMC_INT_INTERVAL */
> +       if (time_after(jiffies, last_jiffies + LS2K_BMC_INT_INTERVAL)) {
> +               schedule_work(&priv->bmc_reset_work);
> +               last_jiffies = jiffies;
> +       }
> +
> +       return IRQ_HANDLED;
> +}
> +
> +/*
> + * Saves the BMC parent device (LS7A) and its own PCI configuration space registers
> + * that need to be restored after BMC reset.
> + */
> +static void ls2k_bmc_save_pci_data(struct pci_dev *pdev, struct ls2k_bmc_pdata *priv)
> +{
> +       struct pci_dev *parent = pdev->bus->self;
> +       int base, i = 0;
> +
> +       pci_read_config_dword(parent, PCI_COMMAND, &priv->bridge_pci_data.pci_command);
> +
> +       for (base = PCI_BASE_ADDRESS_0; base <= PCI_BASE_ADDRESS_5; base += 4, i++)
> +               pci_read_config_dword(parent, base, &priv->bridge_pci_data.base_address[i]);
> +
> +       pci_read_config_dword(parent, PCI_ROM_ADDRESS, &priv->bridge_pci_data.rom_addreess);
> +       pci_read_config_dword(parent, PCI_INTERRUPT_LINE, &priv->bridge_pci_data.interrupt_line);
> +
> +       pci_read_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_LO,
> +                             &priv->bridge_pci_data.msi_lo);
> +       pci_read_config_dword(parent, parent->msi_cap + PCI_MSI_ADDRESS_HI,
> +                             &priv->bridge_pci_data.msi_hi);
> +
> +       pci_read_config_dword(parent, parent->pcie_cap + PCI_EXP_DEVCTL,
> +                             &priv->bridge_pci_data.devctl);
> +       pci_read_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCAP,
> +                             &priv->bridge_pci_data.linkcap);
> +       pci_read_config_dword(parent, parent->pcie_cap + PCI_EXP_LNKCTL,
> +                             &priv->bridge_pci_data.linkctl_sts);
> +
> +       pci_read_config_dword(parent, LS7A_GEN2_CTL, &priv->bridge_pci_data.gen2_ctrl);
> +       priv->bridge_pci_data.gen2_ctrl |= FIELD_PREP(LS7A_GEN2_SPEED_CHANG, 0x1)
> +                                        | FIELD_PREP(LS7A_CONF_PHY_TX, 0x0);
Newline is unnecessary here.

> +
> +       pci_read_config_dword(parent, LS7A_SYMBOL_TIMER, &priv->bridge_pci_data.symbol_timer);
> +       priv->bridge_pci_data.symbol_timer |= LS7A_MASK_LEN_MATCH;
> +
> +       pci_read_config_dword(pdev, PCI_COMMAND, &priv->bmc_pci_data.pci_command);
> +       pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &priv->bmc_pci_data.base_address0);
> +       pci_read_config_dword(pdev, PCI_INTERRUPT_LINE, &priv->bmc_pci_data.interrupt_line);
> +}
> +
> +static int ls2k_bmc_pdata_initial(struct pci_dev *pdev, struct ls2k_bmc_pdata *priv)
> +{
> +       int gsi = 16 + (LS2K_BMC_RESET_GPIO & 7);
> +       void __iomem *gpio_base;
> +       int irq, ret;
> +
> +       ls2k_bmc_save_pci_data(pdev, priv);
> +
> +       INIT_WORK(&priv->bmc_reset_work, ls2k_bmc_events_fn);
> +
> +       ret = devm_request_irq(&pdev->dev, pdev->irq, ls2k_bmc_interrupt,
> +                              IRQF_SHARED | IRQF_TRIGGER_FALLING, "ls2kbmc pcie", priv);
> +       if (ret) {
> +               dev_err(priv->dev, "LS2KBMC PCI-E request_irq(%d) failed\n", pdev->irq);
> +               return ret;
> +       }
> +
> +       /*
> +        * Since Loongson-3 hardware does not support GPIO interrupt cascade,
> +        * chip->gpio_to_irq() cannot be implemented, here acpi_register_gsi() is used
> +        * to get gpio irq.
> +        * The gpio interrupt is a watchdog interrupt that is triggered when the BMC resets.
s/gpio/GPIO/g


Huacai

> +        */
> +       irq = acpi_register_gsi(NULL, gsi, ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_LOW);
> +       if (irq < 0)
> +               return irq;
> +
> +       gpio_base = ioremap(LOONGSON_GPIO_REG_BASE, LOONGSON_GPIO_REG_SIZE);
> +       if (!gpio_base) {
> +               ret = PTR_ERR(gpio_base);
> +               goto acpi_failed;
> +       }
> +
> +       writel(readl(gpio_base + LOONGSON_GPIO_OEN) | BIT(LS2K_BMC_RESET_GPIO),
> +              gpio_base + LOONGSON_GPIO_OEN);
> +       writel(readl(gpio_base + LOONGSON_GPIO_FUNC) & ~BIT(LS2K_BMC_RESET_GPIO),
> +              gpio_base + LOONGSON_GPIO_FUNC);
> +       writel(readl(gpio_base + LOONGSON_GPIO_INTPOL) & ~BIT(LS2K_BMC_RESET_GPIO),
> +              gpio_base + LOONGSON_GPIO_INTPOL);
> +       writel(readl(gpio_base + LOONGSON_GPIO_INTEN) | BIT(LS2K_BMC_RESET_GPIO),
> +              gpio_base + LOONGSON_GPIO_INTEN);
> +
> +       ret = devm_request_irq(priv->dev, irq, ls2k_bmc_interrupt,
> +                              IRQF_SHARED | IRQF_TRIGGER_FALLING, "ls2kbmc gpio", priv);
> +       if (ret)
> +               dev_err(priv->dev, "LS2KBMC GPIO request_irq(%d) failed\n", irq);
> +
> +       iounmap(gpio_base);
> +
> +acpi_failed:
> +       acpi_unregister_gsi(gsi);
> +       return ret;
> +}
> +
>  /*
>   * Currently the Loongson-2K BMC hardware does not have an I2C interface to adapt to the
>   * resolution. We set the resolution by presetting "video=1280x1024-16@2M" to the BMC memory.
> @@ -101,6 +414,7 @@ static int ls2k_bmc_parse_mode(struct pci_dev *pdev, struct simplefb_platform_da
>  static int ls2k_bmc_probe(struct pci_dev *dev, const struct pci_device_id *id)
>  {
>         struct simplefb_platform_data pd;
> +       struct ls2k_bmc_pdata *priv;
>         resource_size_t base;
>         int ret;
>
> @@ -108,6 +422,18 @@ static int ls2k_bmc_probe(struct pci_dev *dev, const struct pci_device_id *id)
>         if (ret)
>                 return ret;
>
> +       priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
> +       if (IS_ERR(priv)) {
> +               ret = -ENOMEM;
> +               goto disable_pci;
> +       }
> +
> +       priv->dev = &dev->dev;
> +
> +       ret = ls2k_bmc_pdata_initial(dev, priv);
> +       if (ret)
> +               goto disable_pci;
> +
>         ret = ls2k_bmc_parse_mode(dev, &pd);
>         if (ret)
>                 goto disable_pci;
> --
> 2.47.1
>
>