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Fri, 18 Jul 2025 04:15:49 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH9QbxoyibgZZyMUpEIKM/wsW0LKvXoPiVOFHYBhjUnG4a++/+O1Hcc5xvbKFBhDfEiitqwkezMta44uTRF0SM= X-Received: by 2002:a17:90b:4fcc:b0:312:e1ec:de44 with SMTP id 98e67ed59e1d1-31c9e77050fmr15952224a91.27.1752837349203; Fri, 18 Jul 2025 04:15:49 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250718062429.238723-1-lulu@redhat.com> In-Reply-To: From: Jason Wang Date: Fri, 18 Jul 2025 19:15:37 +0800 X-Gm-Features: Ac12FXwz4rGUXJq91Ex4E_n4Za48YoQX-dFUm3kg_pscGZgwjRVf5myne0oT9ho Message-ID: Subject: Re: [PATCH v1] kvm: x86: implement PV send_IPI method To: Chao Gao Cc: Cindy Lu , Paolo Bonzini , Vitaly Kuznetsov , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H. Peter Anvin" , "Peter Zijlstra (Intel)" , "Kirill A. Shutemov" , "Xin Li (Intel)" , Rik van Riel , "Ahmed S. Darwish" , "open list:KVM PARAVIRT (KVM/paravirt)" , "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Jul 18, 2025 at 7:01=E2=80=AFPM Chao Gao wrote= : > > On Fri, Jul 18, 2025 at 03:52:30PM +0800, Jason Wang wrote: > >On Fri, Jul 18, 2025 at 2:25=E2=80=AFPM Cindy Lu wrote= : > >> > >> From: Jason Wang > >> > >> We used to have PV version of send_IPI_mask and > >> send_IPI_mask_allbutself. This patch implements PV send_IPI method to > >> reduce the number of vmexits. > > It won't reduce the number of VM-exits; in fact, it may increase them on = CPUs > that support IPI virtualization. Sure, but I wonder if it reduces the vmexits when there's no APICV or L2 VM. I thought it can reduce the 2 vmexits to 1? > > With IPI virtualization enabled, *unicast* and physical-addressing IPIs w= on't > cause a VM-exit. Right. > Instead, the microcode posts interrupts directly to the target > vCPU. The PV version always causes a VM-exit. Yes, but it applies to all PV IPI I think. > > >> > >> Signed-off-by: Jason Wang > >> Tested-by: Cindy Lu > > > >I think a question here is are we able to see performance improvement > >in any kind of setup? > > It may result in a negative performance impact. Userspace can check and enable PV IPI for the case where it suits. For example, HyperV did something like: void __init hv_apic_init(void) { if (ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) { pr_info("Hyper-V: Using IPI hypercalls\n"); /* * Set the IPI entry points. */ orig_apic =3D *apic; apic_update_callback(send_IPI, hv_send_ipi); apic_update_callback(send_IPI_mask, hv_send_ipi_mask); apic_update_callback(send_IPI_mask_allbutself, hv_send_ipi_mask_allbutself); apic_update_callback(send_IPI_allbutself, hv_send_ipi_allbutself); apic_update_callback(send_IPI_all, hv_send_ipi_all); apic_update_callback(send_IPI_self, hv_send_ipi_self); } send_IPI_mask is there. Thanks > > > > >Thanks > > > > >