From: Guodong Xu <guodong@riscstar.com>
To: Vivian Wang <wangruikang@iscas.ac.cn>
Cc: Yixun Lan <dlan@gentoo.org>, Ze Huang <huangze@whut.edu.cn>,
Alex Elder <elder@riscstar.com>,
spacemit@lists.linux.dev, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Vivian Wang <uwu@dram.page>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] riscv: dts: spacemit: Move UARTs under dma-bus for K1
Date: Tue, 24 Jun 2025 20:21:11 +0800 [thread overview]
Message-ID: <CAH1PCMZ1YUC9SLOSEuCL3oUhYN23UOL+kLrOk8fbJ+EG-w3Umg@mail.gmail.com> (raw)
In-Reply-To: <20250623-k1-dma-buses-rfc-wip-v1-2-c0144082061f@iscas.ac.cn>
On Mon, Jun 23, 2025 at 6:04 PM Vivian Wang <wangruikang@iscas.ac.cn> wrote:
>
> UART devices in Spacemit K1 use dma-bus DMA translations. Move these
> nodes under dma-bus to reflect this fact.
>
> Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
> ---
> arch/riscv/boot/dts/spacemit/k1.dtsi | 246 ++++++++++++++++++-----------------
> 1 file changed, 128 insertions(+), 118 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index 99c76997b367f733c9dda2c30dd85817294ef9b7..0d41694699851e672a833601b62c2b2ad3daae79 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
> @@ -357,114 +357,6 @@ syscon_apbc: system-controller@d4015000 {
> #reset-cells = <1>;
> };
>
> - uart0: serial@d4017000 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017000 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART0>,
> - <&syscon_apbc CLK_UART0_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <42>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart2: serial@d4017100 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017100 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART2>,
> - <&syscon_apbc CLK_UART2_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <44>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart3: serial@d4017200 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017200 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART3>,
> - <&syscon_apbc CLK_UART3_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <45>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart4: serial@d4017300 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017300 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART4>,
> - <&syscon_apbc CLK_UART4_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <46>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart5: serial@d4017400 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017400 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART5>,
> - <&syscon_apbc CLK_UART5_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <47>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart6: serial@d4017500 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017500 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART6>,
> - <&syscon_apbc CLK_UART6_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <48>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart7: serial@d4017600 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017600 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART7>,
> - <&syscon_apbc CLK_UART7_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <49>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart8: serial@d4017700 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017700 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART8>,
> - <&syscon_apbc CLK_UART8_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <50>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> - uart9: serial@d4017800 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xd4017800 0x0 0x100>;
> - clocks = <&syscon_apbc CLK_UART9>,
> - <&syscon_apbc CLK_UART9_BUS>;
> - clock-names = "core", "bus";
> - interrupts = <51>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "disabled";
> - };
> -
> gpio: gpio@d4019000 {
> compatible = "spacemit,k1-gpio";
> reg = <0x0 0xd4019000 0x0 0x100>;
> @@ -562,16 +454,6 @@ clint: timer@e4000000 {
> <&cpu7_intc 3>, <&cpu7_intc 7>;
> };
>
> - sec_uart1: serial@f0612000 {
> - compatible = "spacemit,k1-uart", "intel,xscale-uart";
> - reg = <0x0 0xf0612000 0x0 0x100>;
> - interrupts = <43>;
> - clock-frequency = <14857000>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - status = "reserved"; /* for TEE usage */
> - };
> -
Are you sure sec_uart1 should be placed under the dma_bus? Please double
check. If sec_uart1 and other peripherals supported by the secure DMA
(base address: 0xF0600000) share the same address mapping as dma_bus, and
if they can be accessed by the linux kernel in some cases (as saying
'reserved'), then that makes sense. If not, better not move them.
--
Guodong
next prev parent reply other threads:[~2025-06-24 12:21 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-23 10:04 [PATCH 0/3] riscv: dts: spacemit: Add DMA translation buses for K1 Vivian Wang
2025-06-23 10:04 ` [PATCH 1/3] " Vivian Wang
2025-06-26 7:54 ` Guodong Xu
2025-06-23 10:04 ` [PATCH 2/3] riscv: dts: spacemit: Move UARTs under dma-bus " Vivian Wang
2025-06-24 12:21 ` Guodong Xu [this message]
2025-06-24 12:51 ` Vivian Wang
2025-06-25 3:21 ` Vivian Wang
2025-06-26 7:58 ` Guodong Xu
2025-06-23 10:04 ` [PATCH 3/3] riscv: dts: spacemit: Move eMMC under storage-bus " Vivian Wang
2025-07-09 6:40 ` [PATCH 0/3] riscv: dts: spacemit: Add DMA translation buses " Yixun Lan
2025-07-09 7:17 ` Vivian Wang
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