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From: Mike Leach <mike.leach@linaro.org>
To: Jie Gan <jie.gan@oss.qualcomm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	James Clark <james.clark@linaro.org>,
	 Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	 Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	 Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
	Jinlong Mao <jinlong.mao@oss.qualcomm.com>,
	 coresight@lists.linaro.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	 devicetree@vger.kernel.org, Jie Gan <quic_jiegan@quicinc.com>
Subject: Re: [PATCH v4 01/10] coresight: core: Refactoring ctcu_get_active_port and make it generic
Date: Tue, 5 Aug 2025 10:55:04 +0100	[thread overview]
Message-ID: <CAJ9a7VhSMf43_GPhVf=He1S2J_Tn4XLi5cOadbCn+K0St+gdfg@mail.gmail.com> (raw)
In-Reply-To: <20250725100806.1157-2-jie.gan@oss.qualcomm.com>

On Fri, 25 Jul 2025 at 11:08, Jie Gan <jie.gan@oss.qualcomm.com> wrote:
>
> Remove ctcu_get_active_port from CTCU module and add it to the core
> framework.
>
> The port number is crucial for the CTCU device to identify which ETR
> it serves. With the port number we can correctly get required parameters
> of the CTCU device in TMC module.
>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
>  drivers/hwtracing/coresight/coresight-core.c  | 24 +++++++++++++++++++
>  .../hwtracing/coresight/coresight-ctcu-core.c | 19 +--------------
>  drivers/hwtracing/coresight/coresight-priv.h  |  2 ++
>  3 files changed, 27 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
> index 1accd7cbd54b..042c4fa39e55 100644
> --- a/drivers/hwtracing/coresight/coresight-core.c
> +++ b/drivers/hwtracing/coresight/coresight-core.c
> @@ -580,6 +580,30 @@ struct coresight_device *coresight_get_sink(struct coresight_path *path)
>  }
>  EXPORT_SYMBOL_GPL(coresight_get_sink);
>
> +/**
> + * coresight_get_in_port_dest: get the in-port number of the dest device
> + * that is connected to the src device.
> + *
> + * @src: csdev of the source device.
> + * @dest: csdev of the destination device.
> + *
> + * Return: port number upon success or -EINVAL for fail.
> + */
> +int coresight_get_in_port_dest(struct coresight_device *src,
> +                              struct coresight_device *dest)
> +{
> +       struct coresight_platform_data *pdata = dest->pdata;
> +       int i;
> +
> +       for (i = 0; i < pdata->nr_inconns; ++i) {
> +               if (pdata->in_conns[i]->src_dev == src)
> +                       return pdata->in_conns[i]->dest_port;
> +       }
> +
> +       return -EINVAL;
> +}
> +EXPORT_SYMBOL_GPL(coresight_get_in_port_dest);
> +
>  u32 coresight_get_sink_id(struct coresight_device *csdev)
>  {
>         if (!csdev->ea)
> diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hwtracing/coresight/coresight-ctcu-core.c
> index c6bafc96db96..3bdedf041390 100644
> --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c
> +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c
> @@ -118,23 +118,6 @@ static int __ctcu_set_etr_traceid(struct coresight_device *csdev, u8 traceid, in
>         return 0;
>  }
>
> -/*
> - * Searching the sink device from helper's view in case there are multiple helper devices
> - * connected to the sink device.
> - */
> -static int ctcu_get_active_port(struct coresight_device *sink, struct coresight_device *helper)
> -{
> -       struct coresight_platform_data *pdata = helper->pdata;
> -       int i;
> -
> -       for (i = 0; i < pdata->nr_inconns; ++i) {
> -               if (pdata->in_conns[i]->src_dev == sink)
> -                       return pdata->in_conns[i]->dest_port;
> -       }
> -
> -       return -EINVAL;
> -}
> -
>  static int ctcu_set_etr_traceid(struct coresight_device *csdev, struct coresight_path *path,
>                                 bool enable)
>  {
> @@ -147,7 +130,7 @@ static int ctcu_set_etr_traceid(struct coresight_device *csdev, struct coresight
>                 return -EINVAL;
>         }
>
> -       port_num = ctcu_get_active_port(sink, csdev);
> +       port_num = coresight_get_in_port_dest(sink, csdev);
>         if (port_num < 0)
>                 return -EINVAL;
>
> diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
> index 33e22b1ba043..e51b22b8ebde 100644
> --- a/drivers/hwtracing/coresight/coresight-priv.h
> +++ b/drivers/hwtracing/coresight/coresight-priv.h
> @@ -156,6 +156,8 @@ void coresight_remove_links(struct coresight_device *orig,
>  u32 coresight_get_sink_id(struct coresight_device *csdev);
>  void coresight_path_assign_trace_id(struct coresight_path *path,
>                                    enum cs_mode mode);
> +int coresight_get_in_port_dest(struct coresight_device *src,
> +                              struct coresight_device *dest);
>
>  #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X)
>  int etm_readl_cp14(u32 off, unsigned int *val);
> --
> 2.34.1
>

Reviewed by: Mike Leach <mike.leach@linaro.org>

-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK

  reply	other threads:[~2025-08-05  9:55 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-25 10:07 [PATCH v4 00/10] coresight: ctcu: Enable byte-cntr function for TMC ETR Jie Gan
2025-07-25 10:07 ` [PATCH v4 01/10] coresight: core: Refactoring ctcu_get_active_port and make it generic Jie Gan
2025-08-05  9:55   ` Mike Leach [this message]
2025-07-25 10:07 ` [PATCH v4 02/10] coresight: core: add a new API to retrieve the helper device Jie Gan
2025-08-05  9:57   ` Mike Leach
2025-07-25 10:07 ` [PATCH v4 03/10] coresight: tmc: add etr_buf_list to store allocated etr_buf Jie Gan
2025-08-05 10:15   ` Mike Leach
2025-08-06  0:32     ` Jie Gan
2025-07-25 10:08 ` [PATCH v4 04/10] coresight: tmc: add create/delete functions for etr_buf_node Jie Gan
2025-08-05 10:27   ` Mike Leach
2025-08-06  0:45     ` Jie Gan
2025-07-25 10:08 ` [PATCH v4 05/10] coresight: tmc: Introduce tmc_read_ops to wrap read operations Jie Gan
2025-08-05 10:55   ` Mike Leach
2025-08-06  6:30     ` Jie Gan
2025-08-06  6:56       ` Mike Leach
2025-07-25 10:08 ` [PATCH v4 06/10] dt-bindings: arm: add an interrupt property for Coresight CTCU Jie Gan
2025-07-25 10:08 ` [PATCH v4 07/10] coresight: ctcu: enable byte-cntr for TMC ETR devices Jie Gan
2025-07-25 10:08 ` [PATCH v4 08/10] coresight: add a new function in helper_ops Jie Gan
2025-08-05 12:28   ` Mike Leach
2025-08-05 12:30   ` Mike Leach
2025-08-06  0:35     ` Jie Gan
2025-08-06  8:32       ` Jie Gan
2025-07-25 10:08 ` [PATCH v4 09/10] coresight: tmc: integrate byte-cntr's read_ops with sysfs file_ops Jie Gan
2025-07-25 10:08 ` [PATCH v4 10/10] arm64: dts: qcom: sa8775p: Add interrupts to CTCU device Jie Gan

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