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* [RESEND PATCH] x86/ACPI: invalidate all cache lines on ACPI C-state transitions
@ 2025-05-25 18:10 Khalid Ali
  0 siblings, 0 replies; 3+ messages in thread
From: Khalid Ali @ 2025-05-25 18:10 UTC (permalink / raw)
  To: rafael, tglx, mingo, bp, dave.hansen
  Cc: lenb, hpa, x86, linux-acpi, linux-kernel, Khalid Ali

From: Khalid Ali <khaliidcaliy@gmail.com>

According to ACPI spec 6.4 and 6.5, upon C-state
transitions(specifically C2 and C3) it is required and explicitly
mentioned to invalidate and writeback all modified cache line using
WBINVD.

However the current ACPI C-state entry using monitor/mwait instructions
it have been used CLFLUSH by flushing the cache line associated by
monitored address. That what all about this patch addresses,
invalidating all cache lines instead of single cache line.

Let me know if there any reason and decisions behind the current
implementation.

Signed-off-by: Khalid Ali <khaliidcaliy@gmail.com>
---
 arch/x86/kernel/acpi/cstate.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index d5ac34186555..eb3d435e08ad 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -222,6 +222,9 @@ void __cpuidle acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx)
 	struct cstate_entry *percpu_entry;
 
 	percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu);
+	/* flush and invalidate all modified cache line on C3 and C2 state entry*/
+	if (cx->type == ACPI_STATE_C3 || cx->type == ACPI_STATE_C2)
+		wbinvd();
 	mwait_idle_with_hints(percpu_entry->states[cx->index].eax,
 	                      percpu_entry->states[cx->index].ecx);
 }
-- 
2.49.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [RESEND PATCH] x86/ACPI: invalidate all cache lines on ACPI C-state transitions
@ 2025-05-30 17:54 Khalid Ali
  2025-06-04  9:23 ` Rafael J. Wysocki
  0 siblings, 1 reply; 3+ messages in thread
From: Khalid Ali @ 2025-05-30 17:54 UTC (permalink / raw)
  To: rafael, enb, tglx, mingo, bp, dave.hansen
  Cc: x86, hpa, linux-acpi, linux-kernel, Khalid Ali

From: Khalid Ali <khaliidcaliy@gmail.com>

According to ACPI spec 6.4 and 6.5, upon C-state
transitions (specifically C2 and C3) it is required and explicitly
mentioned to invalidate and writeback all modified cache line using
WBINVD.

However the current ACPI C-state entry using monitor/mwait instructions
it have been used CLFLUSH by flushing the cache line associated by
monitored address. That what all about this patch addresses,
invalidating all cache lines instead of single cache line.

Let me know if there any reason and decisions behind the current
implementation.

Signed-off-by: Khalid Ali <khaliidcaliy@gmail.com>
---
 arch/x86/kernel/acpi/cstate.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index d5ac34186555..eb3d435e08ad 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -222,6 +222,9 @@ void __cpuidle acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx)
 	struct cstate_entry *percpu_entry;
 
 	percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu);
+	/* flush and invalidate all modified cache line on C3 and C2 state entry*/
+	if (cx->type == ACPI_STATE_C3 || cx->type == ACPI_STATE_C2)
+		wbinvd();
 	mwait_idle_with_hints(percpu_entry->states[cx->index].eax,
 	                      percpu_entry->states[cx->index].ecx);
 }
-- 
2.49.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [RESEND PATCH] x86/ACPI: invalidate all cache lines on ACPI C-state transitions
  2025-05-30 17:54 [RESEND PATCH] x86/ACPI: invalidate all cache lines on ACPI C-state transitions Khalid Ali
@ 2025-06-04  9:23 ` Rafael J. Wysocki
  0 siblings, 0 replies; 3+ messages in thread
From: Rafael J. Wysocki @ 2025-06-04  9:23 UTC (permalink / raw)
  To: Khalid Ali
  Cc: rafael, enb, tglx, mingo, bp, dave.hansen, x86, hpa, linux-acpi,
	linux-kernel, Peter Zijlstra

On Fri, May 30, 2025 at 7:54 PM Khalid Ali <khaliidcaliy@gmail.com> wrote:
>
> From: Khalid Ali <khaliidcaliy@gmail.com>
>
> According to ACPI spec 6.4 and 6.5, upon C-state

Which section?

> transitions (specifically C2 and C3) it is required and explicitly
> mentioned to invalidate and writeback all modified cache line using
> WBINVD.
>
> However the current ACPI C-state entry using monitor/mwait instructions
> it have been used CLFLUSH by flushing the cache line associated by
> monitored address. That what all about this patch addresses,
> invalidating all cache lines instead of single cache line.
>
> Let me know if there any reason and decisions behind the current
> implementation.

I think that Peter has answered this already.

Anyway: Is there any practical reason to make this change?  For
instance, any system that doesn't work before it and works after it?

> Signed-off-by: Khalid Ali <khaliidcaliy@gmail.com>
> ---
>  arch/x86/kernel/acpi/cstate.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
> index d5ac34186555..eb3d435e08ad 100644
> --- a/arch/x86/kernel/acpi/cstate.c
> +++ b/arch/x86/kernel/acpi/cstate.c
> @@ -222,6 +222,9 @@ void __cpuidle acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx)
>         struct cstate_entry *percpu_entry;
>
>         percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu);
> +       /* flush and invalidate all modified cache line on C3 and C2 state entry*/
> +       if (cx->type == ACPI_STATE_C3 || cx->type == ACPI_STATE_C2)
> +               wbinvd();
>         mwait_idle_with_hints(percpu_entry->states[cx->index].eax,
>                               percpu_entry->states[cx->index].ecx);
>  }
> --

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2025-06-04  9:23 UTC | newest]

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2025-05-30 17:54 [RESEND PATCH] x86/ACPI: invalidate all cache lines on ACPI C-state transitions Khalid Ali
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2025-05-25 18:10 Khalid Ali

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