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AJvYcCVU/+wR/tMegUMSRHs//XF1OtB28IUEzkTR91q4qG/bqo98AvU8dBXx+Jb3Vr1GLun08bg=@vger.kernel.org X-Gm-Message-State: AOJu0YybyeqHMeWFWqsaUvWO1yh4jn28oajR4IDinsoVD0xnDZBGFo6O +WxC5zxOcRKV+CcN6cErEpSUrx6h1ZeKtVJrjr0W4bkfZSP9X7BZeLdRAz/C9s37HRG0XzSwJL1 9VCSOvQbHGnT8HQEDNlwpQ+IsViAdROo= X-Gm-Gg: ASbGnctKK79fGo3rI9pM09alBkMXDcKIwhRuRXM0J+TEmkqIsBj2cXpBKh6sIg3izRG 9tqTkHR2E52p0lyVW6LU7SELUNIKX2VS1FvjXfuwYuMBeihohlQ94HhyGLzwX4mAWMoHimlQYfI tJlwm5o2LPmyoU4BbG9Ne6UJt5pSYq0ac4F7jKdCq/yt1mhoRZ50doVcCbyojucr9dDD+GWpBcF ikq X-Google-Smtp-Source: AGHT+IHriterOPD9Qupmq+qudDIs3lX0hEYmQnAcn5/ydpzgAlJ2/vmYB4mF9qSntvsAqaJGcsCAgwtspg2vcdcWQyI= X-Received: by 2002:a17:903:46cd:b0:235:655:11aa with SMTP id d9443c01a7336-23dede92f44mr255478385ad.39.1752567376701; Tue, 15 Jul 2025 01:16:16 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250709033242.267892-1-Neeraj.Upadhyay@amd.com> <20250709033242.267892-21-Neeraj.Upadhyay@amd.com> In-Reply-To: <20250709033242.267892-21-Neeraj.Upadhyay@amd.com> From: Tianyu Lan Date: Tue, 15 Jul 2025 16:15:40 +0800 X-Gm-Features: Ac12FXwwngu-P7YkPKj3RPXnjWAGOV3pJHB2VxbIGQMRr41V44LUEyvWThpEouI Message-ID: Subject: Re: [RFC PATCH v8 20/35] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver To: Neeraj Upadhyay Cc: linux-kernel@vger.kernel.org, bp@alien8.de, tglx@linutronix.de, mingo@redhat.com, dave.hansen@linux.intel.com, Thomas.Lendacky@amd.com, nikunj@amd.com, Santosh.Shukla@amd.com, Vasant.Hegde@amd.com, Suravee.Suthikulpanit@amd.com, David.Kaplan@amd.com, x86@kernel.org, hpa@zytor.com, peterz@infradead.org, seanjc@google.com, pbonzini@redhat.com, kvm@vger.kernel.org, kirill.shutemov@linux.intel.com, huibo.wang@amd.com, naveen.rao@amd.com, kai.huang@intel.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Jul 9, 2025 at 11:40=E2=80=AFAM Neeraj Upadhyay wrote: > > Add read() and write() APIC callback functions to read and write x2APIC > registers directly from the guest APIC backing page of a vCPU. > > The x2APIC registers are mapped at an offset within the guest APIC > backing page which is same as their x2APIC MMIO offset. Secure AVIC > adds new registers such as ALLOWED_IRRs (which are at 4-byte offset > within the IRR register offset range) and NMI_REQ to the APIC register > space. > > When Secure AVIC is enabled, guest's rdmsr/wrmsr of APIC registers > result in VC exception (for non-accelerated register accesses) with > error code VMEXIT_AVIC_NOACCEL. The VC exception handler can read/write > the x2APIC register in the guest APIC backing page to complete the > rdmsr/wrmsr. Since doing this would increase the latency of accessing > x2APIC registers, instead of doing rdmsr/wrmsr based reg accesses > and handling reads/writes in VC exception, directly read/write APIC > registers from/to the guest APIC backing page of the vCPU in read() > and write() callbacks of the Secure AVIC APIC driver. > > Co-developed-by: Kishon Vijay Abraham I > Signed-off-by: Kishon Vijay Abraham I > Signed-off-by: Neeraj Upadhyay > --- > Changes since v7: > - No change. Reviewed-by: Tianyu Lan