* [PATCH 1/8] dt-bindings: power: qcom-rpmpd: split RPMh domains definitions
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-18 17:21 ` Konrad Dybcio
2025-07-29 16:00 ` Rob Herring (Arm)
2025-07-18 16:13 ` [PATCH 2/8] dt-bindings: power: qcom-rpmpd: sort out entries Dmitry Baryshkov
` (7 subsequent siblings)
8 siblings, 2 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
Historically both RPM and RPMh domain definitions were a part of the
same, qcom-rpmpd.h header. Now as we have a separate header for RPMh
definitions, qcom,rpmhpd.h, move all RPMh power domain definitions to
that header.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
include/dt-bindings/power/qcom,rpmhpd.h | 233 ++++++++++++++++++++++++++++++++
include/dt-bindings/power/qcom-rpmpd.h | 228 +------------------------------
2 files changed, 234 insertions(+), 227 deletions(-)
diff --git a/include/dt-bindings/power/qcom,rpmhpd.h b/include/dt-bindings/power/qcom,rpmhpd.h
index e54ffa3614515ca19e7ef93d33c22645c13a128b..73cceb88953f705106486b7e111b3ffc39c85664 100644
--- a/include/dt-bindings/power/qcom,rpmhpd.h
+++ b/include/dt-bindings/power/qcom,rpmhpd.h
@@ -29,4 +29,237 @@
#define RPMHPD_NSP2 19
#define RPMHPD_GMXC 20
+/* RPMh Power Domain performance levels */
+#define RPMH_REGULATOR_LEVEL_RETENTION 16
+#define RPMH_REGULATOR_LEVEL_MIN_SVS 48
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D3 50
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D2 52
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D1 56
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D0 60
+#define RPMH_REGULATOR_LEVEL_LOW_SVS 64
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_P1 72
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_L1 80
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_L2 96
+#define RPMH_REGULATOR_LEVEL_SVS 128
+#define RPMH_REGULATOR_LEVEL_SVS_L0 144
+#define RPMH_REGULATOR_LEVEL_SVS_L1 192
+#define RPMH_REGULATOR_LEVEL_SVS_L2 224
+#define RPMH_REGULATOR_LEVEL_NOM 256
+#define RPMH_REGULATOR_LEVEL_NOM_L0 288
+#define RPMH_REGULATOR_LEVEL_NOM_L1 320
+#define RPMH_REGULATOR_LEVEL_NOM_L2 336
+#define RPMH_REGULATOR_LEVEL_TURBO 384
+#define RPMH_REGULATOR_LEVEL_TURBO_L0 400
+#define RPMH_REGULATOR_LEVEL_TURBO_L1 416
+#define RPMH_REGULATOR_LEVEL_TURBO_L2 432
+#define RPMH_REGULATOR_LEVEL_TURBO_L3 448
+#define RPMH_REGULATOR_LEVEL_TURBO_L4 452
+#define RPMH_REGULATOR_LEVEL_TURBO_L5 456
+#define RPMH_REGULATOR_LEVEL_SUPER_TURBO 464
+#define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR 480
+
+/*
+ * Platform-specific power domain bindings. Don't add new entries here, use
+ * RPMHPD_* above.
+ */
+
+/* SA8775P Power Domain Indexes */
+#define SA8775P_CX 0
+#define SA8775P_CX_AO 1
+#define SA8775P_DDR 2
+#define SA8775P_EBI 3
+#define SA8775P_GFX 4
+#define SA8775P_LCX 5
+#define SA8775P_LMX 6
+#define SA8775P_MMCX 7
+#define SA8775P_MMCX_AO 8
+#define SA8775P_MSS 9
+#define SA8775P_MX 10
+#define SA8775P_MX_AO 11
+#define SA8775P_MXC 12
+#define SA8775P_MXC_AO 13
+#define SA8775P_NSP0 14
+#define SA8775P_NSP1 15
+#define SA8775P_XO 16
+
+/* SDM670 Power Domain Indexes */
+#define SDM670_MX 0
+#define SDM670_MX_AO 1
+#define SDM670_CX 2
+#define SDM670_CX_AO 3
+#define SDM670_LMX 4
+#define SDM670_LCX 5
+#define SDM670_GFX 6
+#define SDM670_MSS 7
+
+/* SDM845 Power Domain Indexes */
+#define SDM845_EBI 0
+#define SDM845_MX 1
+#define SDM845_MX_AO 2
+#define SDM845_CX 3
+#define SDM845_CX_AO 4
+#define SDM845_LMX 5
+#define SDM845_LCX 6
+#define SDM845_GFX 7
+#define SDM845_MSS 8
+
+/* SDX55 Power Domain Indexes */
+#define SDX55_MSS 0
+#define SDX55_MX 1
+#define SDX55_CX 2
+
+/* SDX65 Power Domain Indexes */
+#define SDX65_MSS 0
+#define SDX65_MX 1
+#define SDX65_MX_AO 2
+#define SDX65_CX 3
+#define SDX65_CX_AO 4
+#define SDX65_MXC 5
+
+/* SM6350 Power Domain Indexes */
+#define SM6350_CX 0
+#define SM6350_GFX 1
+#define SM6350_LCX 2
+#define SM6350_LMX 3
+#define SM6350_MSS 4
+#define SM6350_MX 5
+
+/* SM8150 Power Domain Indexes */
+#define SM8150_MSS 0
+#define SM8150_EBI 1
+#define SM8150_LMX 2
+#define SM8150_LCX 3
+#define SM8150_GFX 4
+#define SM8150_MX 5
+#define SM8150_MX_AO 6
+#define SM8150_CX 7
+#define SM8150_CX_AO 8
+#define SM8150_MMCX 9
+#define SM8150_MMCX_AO 10
+
+/* SA8155P is a special case, kept for backwards compatibility */
+#define SA8155P_CX SM8150_CX
+#define SA8155P_CX_AO SM8150_CX_AO
+#define SA8155P_EBI SM8150_EBI
+#define SA8155P_GFX SM8150_GFX
+#define SA8155P_MSS SM8150_MSS
+#define SA8155P_MX SM8150_MX
+#define SA8155P_MX_AO SM8150_MX_AO
+
+/* SM8250 Power Domain Indexes */
+#define SM8250_CX 0
+#define SM8250_CX_AO 1
+#define SM8250_EBI 2
+#define SM8250_GFX 3
+#define SM8250_LCX 4
+#define SM8250_LMX 5
+#define SM8250_MMCX 6
+#define SM8250_MMCX_AO 7
+#define SM8250_MX 8
+#define SM8250_MX_AO 9
+
+/* SM8350 Power Domain Indexes */
+#define SM8350_CX 0
+#define SM8350_CX_AO 1
+#define SM8350_EBI 2
+#define SM8350_GFX 3
+#define SM8350_LCX 4
+#define SM8350_LMX 5
+#define SM8350_MMCX 6
+#define SM8350_MMCX_AO 7
+#define SM8350_MX 8
+#define SM8350_MX_AO 9
+#define SM8350_MXC 10
+#define SM8350_MXC_AO 11
+#define SM8350_MSS 12
+
+/* SM8450 Power Domain Indexes */
+#define SM8450_CX 0
+#define SM8450_CX_AO 1
+#define SM8450_EBI 2
+#define SM8450_GFX 3
+#define SM8450_LCX 4
+#define SM8450_LMX 5
+#define SM8450_MMCX 6
+#define SM8450_MMCX_AO 7
+#define SM8450_MX 8
+#define SM8450_MX_AO 9
+#define SM8450_MXC 10
+#define SM8450_MXC_AO 11
+#define SM8450_MSS 12
+
+/* SM8550 Power Domain Indexes */
+#define SM8550_CX 0
+#define SM8550_CX_AO 1
+#define SM8550_EBI 2
+#define SM8550_GFX 3
+#define SM8550_LCX 4
+#define SM8550_LMX 5
+#define SM8550_MMCX 6
+#define SM8550_MMCX_AO 7
+#define SM8550_MX 8
+#define SM8550_MX_AO 9
+#define SM8550_MXC 10
+#define SM8550_MXC_AO 11
+#define SM8550_MSS 12
+#define SM8550_NSP 13
+
+/* QDU1000/QRU1000 Power Domain Indexes */
+#define QDU1000_EBI 0
+#define QDU1000_MSS 1
+#define QDU1000_CX 2
+#define QDU1000_MX 3
+
+/* SC7180 Power Domain Indexes */
+#define SC7180_CX 0
+#define SC7180_CX_AO 1
+#define SC7180_GFX 2
+#define SC7180_MX 3
+#define SC7180_MX_AO 4
+#define SC7180_LMX 5
+#define SC7180_LCX 6
+#define SC7180_MSS 7
+
+/* SC7280 Power Domain Indexes */
+#define SC7280_CX 0
+#define SC7280_CX_AO 1
+#define SC7280_EBI 2
+#define SC7280_GFX 3
+#define SC7280_MX 4
+#define SC7280_MX_AO 5
+#define SC7280_LMX 6
+#define SC7280_LCX 7
+#define SC7280_MSS 8
+
+/* SC8180X Power Domain Indexes */
+#define SC8180X_CX 0
+#define SC8180X_CX_AO 1
+#define SC8180X_EBI 2
+#define SC8180X_GFX 3
+#define SC8180X_LCX 4
+#define SC8180X_LMX 5
+#define SC8180X_MMCX 6
+#define SC8180X_MMCX_AO 7
+#define SC8180X_MSS 8
+#define SC8180X_MX 9
+#define SC8180X_MX_AO 10
+
+/* SC8280XP Power Domain Indexes */
+#define SC8280XP_CX 0
+#define SC8280XP_CX_AO 1
+#define SC8280XP_DDR 2
+#define SC8280XP_EBI 3
+#define SC8280XP_GFX 4
+#define SC8280XP_LCX 5
+#define SC8280XP_LMX 6
+#define SC8280XP_MMCX 7
+#define SC8280XP_MMCX_AO 8
+#define SC8280XP_MSS 9
+#define SC8280XP_MX 10
+#define SC8280XP_MXC 12
+#define SC8280XP_MX_AO 11
+#define SC8280XP_NSP 13
+#define SC8280XP_QPHY 14
+#define SC8280XP_XO 15
+
#endif
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index f15bcee7c9283e74dc8e6f9b6b6f73c0ced009e4..d303b3b37f18e0ff63929f3fe197151c5a3d3364 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -4,66 +4,7 @@
#ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
#define _DT_BINDINGS_POWER_QCOM_RPMPD_H
-/* SA8775P Power Domain Indexes */
-#define SA8775P_CX 0
-#define SA8775P_CX_AO 1
-#define SA8775P_DDR 2
-#define SA8775P_EBI 3
-#define SA8775P_GFX 4
-#define SA8775P_LCX 5
-#define SA8775P_LMX 6
-#define SA8775P_MMCX 7
-#define SA8775P_MMCX_AO 8
-#define SA8775P_MSS 9
-#define SA8775P_MX 10
-#define SA8775P_MX_AO 11
-#define SA8775P_MXC 12
-#define SA8775P_MXC_AO 13
-#define SA8775P_NSP0 14
-#define SA8775P_NSP1 15
-#define SA8775P_XO 16
-
-/* SDM670 Power Domain Indexes */
-#define SDM670_MX 0
-#define SDM670_MX_AO 1
-#define SDM670_CX 2
-#define SDM670_CX_AO 3
-#define SDM670_LMX 4
-#define SDM670_LCX 5
-#define SDM670_GFX 6
-#define SDM670_MSS 7
-
-/* SDM845 Power Domain Indexes */
-#define SDM845_EBI 0
-#define SDM845_MX 1
-#define SDM845_MX_AO 2
-#define SDM845_CX 3
-#define SDM845_CX_AO 4
-#define SDM845_LMX 5
-#define SDM845_LCX 6
-#define SDM845_GFX 7
-#define SDM845_MSS 8
-
-/* SDX55 Power Domain Indexes */
-#define SDX55_MSS 0
-#define SDX55_MX 1
-#define SDX55_CX 2
-
-/* SDX65 Power Domain Indexes */
-#define SDX65_MSS 0
-#define SDX65_MX 1
-#define SDX65_MX_AO 2
-#define SDX65_CX 3
-#define SDX65_CX_AO 4
-#define SDX65_MXC 5
-
-/* SM6350 Power Domain Indexes */
-#define SM6350_CX 0
-#define SM6350_GFX 1
-#define SM6350_LCX 2
-#define SM6350_LMX 3
-#define SM6350_MSS 4
-#define SM6350_MX 5
+#include <dt-bindings/power/qcom,rpmhpd.h>
/* SM6375 Power Domain Indexes */
#define SM6375_VDDCX 0
@@ -77,173 +18,6 @@
#define SM6375_VDD_LPI_CX 8
#define SM6375_VDD_LPI_MX 9
-/* SM8150 Power Domain Indexes */
-#define SM8150_MSS 0
-#define SM8150_EBI 1
-#define SM8150_LMX 2
-#define SM8150_LCX 3
-#define SM8150_GFX 4
-#define SM8150_MX 5
-#define SM8150_MX_AO 6
-#define SM8150_CX 7
-#define SM8150_CX_AO 8
-#define SM8150_MMCX 9
-#define SM8150_MMCX_AO 10
-
-/* SA8155P is a special case, kept for backwards compatibility */
-#define SA8155P_CX SM8150_CX
-#define SA8155P_CX_AO SM8150_CX_AO
-#define SA8155P_EBI SM8150_EBI
-#define SA8155P_GFX SM8150_GFX
-#define SA8155P_MSS SM8150_MSS
-#define SA8155P_MX SM8150_MX
-#define SA8155P_MX_AO SM8150_MX_AO
-
-/* SM8250 Power Domain Indexes */
-#define SM8250_CX 0
-#define SM8250_CX_AO 1
-#define SM8250_EBI 2
-#define SM8250_GFX 3
-#define SM8250_LCX 4
-#define SM8250_LMX 5
-#define SM8250_MMCX 6
-#define SM8250_MMCX_AO 7
-#define SM8250_MX 8
-#define SM8250_MX_AO 9
-
-/* SM8350 Power Domain Indexes */
-#define SM8350_CX 0
-#define SM8350_CX_AO 1
-#define SM8350_EBI 2
-#define SM8350_GFX 3
-#define SM8350_LCX 4
-#define SM8350_LMX 5
-#define SM8350_MMCX 6
-#define SM8350_MMCX_AO 7
-#define SM8350_MX 8
-#define SM8350_MX_AO 9
-#define SM8350_MXC 10
-#define SM8350_MXC_AO 11
-#define SM8350_MSS 12
-
-/* SM8450 Power Domain Indexes */
-#define SM8450_CX 0
-#define SM8450_CX_AO 1
-#define SM8450_EBI 2
-#define SM8450_GFX 3
-#define SM8450_LCX 4
-#define SM8450_LMX 5
-#define SM8450_MMCX 6
-#define SM8450_MMCX_AO 7
-#define SM8450_MX 8
-#define SM8450_MX_AO 9
-#define SM8450_MXC 10
-#define SM8450_MXC_AO 11
-#define SM8450_MSS 12
-
-/* SM8550 Power Domain Indexes */
-#define SM8550_CX 0
-#define SM8550_CX_AO 1
-#define SM8550_EBI 2
-#define SM8550_GFX 3
-#define SM8550_LCX 4
-#define SM8550_LMX 5
-#define SM8550_MMCX 6
-#define SM8550_MMCX_AO 7
-#define SM8550_MX 8
-#define SM8550_MX_AO 9
-#define SM8550_MXC 10
-#define SM8550_MXC_AO 11
-#define SM8550_MSS 12
-#define SM8550_NSP 13
-
-/* QDU1000/QRU1000 Power Domain Indexes */
-#define QDU1000_EBI 0
-#define QDU1000_MSS 1
-#define QDU1000_CX 2
-#define QDU1000_MX 3
-
-/* SC7180 Power Domain Indexes */
-#define SC7180_CX 0
-#define SC7180_CX_AO 1
-#define SC7180_GFX 2
-#define SC7180_MX 3
-#define SC7180_MX_AO 4
-#define SC7180_LMX 5
-#define SC7180_LCX 6
-#define SC7180_MSS 7
-
-/* SC7280 Power Domain Indexes */
-#define SC7280_CX 0
-#define SC7280_CX_AO 1
-#define SC7280_EBI 2
-#define SC7280_GFX 3
-#define SC7280_MX 4
-#define SC7280_MX_AO 5
-#define SC7280_LMX 6
-#define SC7280_LCX 7
-#define SC7280_MSS 8
-
-/* SC8180X Power Domain Indexes */
-#define SC8180X_CX 0
-#define SC8180X_CX_AO 1
-#define SC8180X_EBI 2
-#define SC8180X_GFX 3
-#define SC8180X_LCX 4
-#define SC8180X_LMX 5
-#define SC8180X_MMCX 6
-#define SC8180X_MMCX_AO 7
-#define SC8180X_MSS 8
-#define SC8180X_MX 9
-#define SC8180X_MX_AO 10
-
-/* SC8280XP Power Domain Indexes */
-#define SC8280XP_CX 0
-#define SC8280XP_CX_AO 1
-#define SC8280XP_DDR 2
-#define SC8280XP_EBI 3
-#define SC8280XP_GFX 4
-#define SC8280XP_LCX 5
-#define SC8280XP_LMX 6
-#define SC8280XP_MMCX 7
-#define SC8280XP_MMCX_AO 8
-#define SC8280XP_MSS 9
-#define SC8280XP_MX 10
-#define SC8280XP_MXC 12
-#define SC8280XP_MX_AO 11
-#define SC8280XP_NSP 13
-#define SC8280XP_QPHY 14
-#define SC8280XP_XO 15
-
-/* SDM845 Power Domain performance levels */
-#define RPMH_REGULATOR_LEVEL_RETENTION 16
-#define RPMH_REGULATOR_LEVEL_MIN_SVS 48
-#define RPMH_REGULATOR_LEVEL_LOW_SVS_D3 50
-#define RPMH_REGULATOR_LEVEL_LOW_SVS_D2 52
-#define RPMH_REGULATOR_LEVEL_LOW_SVS_D1 56
-#define RPMH_REGULATOR_LEVEL_LOW_SVS_D0 60
-#define RPMH_REGULATOR_LEVEL_LOW_SVS 64
-#define RPMH_REGULATOR_LEVEL_LOW_SVS_P1 72
-#define RPMH_REGULATOR_LEVEL_LOW_SVS_L1 80
-#define RPMH_REGULATOR_LEVEL_LOW_SVS_L2 96
-#define RPMH_REGULATOR_LEVEL_SVS 128
-#define RPMH_REGULATOR_LEVEL_SVS_L0 144
-#define RPMH_REGULATOR_LEVEL_SVS_L1 192
-#define RPMH_REGULATOR_LEVEL_SVS_L2 224
-#define RPMH_REGULATOR_LEVEL_NOM 256
-#define RPMH_REGULATOR_LEVEL_NOM_L0 288
-#define RPMH_REGULATOR_LEVEL_NOM_L1 320
-#define RPMH_REGULATOR_LEVEL_NOM_L2 336
-#define RPMH_REGULATOR_LEVEL_TURBO 384
-#define RPMH_REGULATOR_LEVEL_TURBO_L0 400
-#define RPMH_REGULATOR_LEVEL_TURBO_L1 416
-#define RPMH_REGULATOR_LEVEL_TURBO_L2 432
-#define RPMH_REGULATOR_LEVEL_TURBO_L3 448
-#define RPMH_REGULATOR_LEVEL_TURBO_L4 452
-#define RPMH_REGULATOR_LEVEL_TURBO_L5 456
-#define RPMH_REGULATOR_LEVEL_SUPER_TURBO 464
-#define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR 480
-
/* MDM9607 Power Domains */
#define MDM9607_VDDCX 0
#define MDM9607_VDDCX_AO 1
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 1/8] dt-bindings: power: qcom-rpmpd: split RPMh domains definitions
2025-07-18 16:13 ` [PATCH 1/8] dt-bindings: power: qcom-rpmpd: split RPMh domains definitions Dmitry Baryshkov
@ 2025-07-18 17:21 ` Konrad Dybcio
2025-07-29 16:00 ` Rob Herring (Arm)
1 sibling, 0 replies; 17+ messages in thread
From: Konrad Dybcio @ 2025-07-18 17:21 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Ulf Hansson, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
On 7/18/25 6:13 PM, Dmitry Baryshkov wrote:
> Historically both RPM and RPMh domain definitions were a part of the
> same, qcom-rpmpd.h header. Now as we have a separate header for RPMh
> definitions, qcom,rpmhpd.h, move all RPMh power domain definitions to
> that header.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
[...]
> -/* SC8280XP Power Domain Indexes */
> -#define SC8280XP_CX 0
> -#define SC8280XP_CX_AO 1
> -#define SC8280XP_DDR 2
> -#define SC8280XP_EBI 3
> -#define SC8280XP_GFX 4
> -#define SC8280XP_LCX 5
> -#define SC8280XP_LMX 6
> -#define SC8280XP_MMCX 7
> -#define SC8280XP_MMCX_AO 8
> -#define SC8280XP_MSS 9
> -#define SC8280XP_MX 10
> -#define SC8280XP_MXC 12
> -#define SC8280XP_MX_AO 11
> -#define SC8280XP_NSP 13
> -#define SC8280XP_QPHY 14
> -#define SC8280XP_XO 15
> -
> -/* SDM845 Power Domain performance levels */
I was never a fan of these comments but whatever, it's an include
if the dt folks don't object, this is good
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/8] dt-bindings: power: qcom-rpmpd: split RPMh domains definitions
2025-07-18 16:13 ` [PATCH 1/8] dt-bindings: power: qcom-rpmpd: split RPMh domains definitions Dmitry Baryshkov
2025-07-18 17:21 ` Konrad Dybcio
@ 2025-07-29 16:00 ` Rob Herring (Arm)
1 sibling, 0 replies; 17+ messages in thread
From: Rob Herring (Arm) @ 2025-07-29 16:00 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: linux-arm-msm, Krzysztof Kozlowski, linux-pm, linux-kernel,
Ulf Hansson, Bjorn Andersson, devicetree, Conor Dooley,
Konrad Dybcio
On Fri, 18 Jul 2025 19:13:39 +0300, Dmitry Baryshkov wrote:
> Historically both RPM and RPMh domain definitions were a part of the
> same, qcom-rpmpd.h header. Now as we have a separate header for RPMh
> definitions, qcom,rpmhpd.h, move all RPMh power domain definitions to
> that header.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> include/dt-bindings/power/qcom,rpmhpd.h | 233 ++++++++++++++++++++++++++++++++
> include/dt-bindings/power/qcom-rpmpd.h | 228 +------------------------------
> 2 files changed, 234 insertions(+), 227 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 2/8] dt-bindings: power: qcom-rpmpd: sort out entries
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
2025-07-18 16:13 ` [PATCH 1/8] dt-bindings: power: qcom-rpmpd: split RPMh domains definitions Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-29 16:00 ` Rob Herring (Arm)
2025-07-18 16:13 ` [PATCH 3/8] dt-bindings: power: qcom-rpmpd: add generic bindings for RPM power domains Dmitry Baryshkov
` (6 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
After removing RPMh PD indices, it becomes obvious that several entries
don't follow the alphabetic sorting order. Move them in order to keep
the file sorted.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
include/dt-bindings/power/qcom-rpmpd.h | 42 +++++++++++++++++-----------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index d303b3b37f18e0ff63929f3fe197151c5a3d3364..65f7d5ecc3521cfbc45d6158bd6143ea09f47302 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -6,18 +6,6 @@
#include <dt-bindings/power/qcom,rpmhpd.h>
-/* SM6375 Power Domain Indexes */
-#define SM6375_VDDCX 0
-#define SM6375_VDDCX_AO 1
-#define SM6375_VDDCX_VFL 2
-#define SM6375_VDDMX 3
-#define SM6375_VDDMX_AO 4
-#define SM6375_VDDMX_VFL 5
-#define SM6375_VDDGX 6
-#define SM6375_VDDGX_AO 7
-#define SM6375_VDD_LPI_CX 8
-#define SM6375_VDD_LPI_MX 9
-
/* MDM9607 Power Domains */
#define MDM9607_VDDCX 0
#define MDM9607_VDDCX_AO 1
@@ -130,6 +118,16 @@
#define MSM8998_SSCMX 8
#define MSM8998_SSCMX_VFL 9
+/* QCM2290 Power Domains */
+#define QCM2290_VDDCX 0
+#define QCM2290_VDDCX_AO 1
+#define QCM2290_VDDCX_VFL 2
+#define QCM2290_VDDMX 3
+#define QCM2290_VDDMX_AO 4
+#define QCM2290_VDDMX_VFL 5
+#define QCM2290_VDD_LPI_CX 6
+#define QCM2290_VDD_LPI_MX 7
+
/* QCS404 Power Domains */
#define QCS404_VDDMX 0
#define QCS404_VDDMX_AO 1
@@ -169,15 +167,17 @@
#define SM6125_VDDMX_AO 4
#define SM6125_VDDMX_VFL 5
-/* QCM2290 Power Domains */
-#define QCM2290_VDDCX 0
-#define QCM2290_VDDCX_AO 1
-#define QCM2290_VDDCX_VFL 2
-#define QCM2290_VDDMX 3
-#define QCM2290_VDDMX_AO 4
-#define QCM2290_VDDMX_VFL 5
-#define QCM2290_VDD_LPI_CX 6
-#define QCM2290_VDD_LPI_MX 7
+/* SM6375 Power Domain Indexes */
+#define SM6375_VDDCX 0
+#define SM6375_VDDCX_AO 1
+#define SM6375_VDDCX_VFL 2
+#define SM6375_VDDMX 3
+#define SM6375_VDDMX_AO 4
+#define SM6375_VDDMX_VFL 5
+#define SM6375_VDDGX 6
+#define SM6375_VDDGX_AO 7
+#define SM6375_VDD_LPI_CX 8
+#define SM6375_VDD_LPI_MX 9
/* RPM SMD Power Domain performance levels */
#define RPM_SMD_LEVEL_RETENTION 16
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 2/8] dt-bindings: power: qcom-rpmpd: sort out entries
2025-07-18 16:13 ` [PATCH 2/8] dt-bindings: power: qcom-rpmpd: sort out entries Dmitry Baryshkov
@ 2025-07-29 16:00 ` Rob Herring (Arm)
0 siblings, 0 replies; 17+ messages in thread
From: Rob Herring (Arm) @ 2025-07-29 16:00 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Ulf Hansson, Bjorn Andersson, linux-kernel, linux-arm-msm,
Konrad Dybcio, Conor Dooley, Krzysztof Kozlowski, linux-pm,
devicetree
On Fri, 18 Jul 2025 19:13:40 +0300, Dmitry Baryshkov wrote:
> After removing RPMh PD indices, it becomes obvious that several entries
> don't follow the alphabetic sorting order. Move them in order to keep
> the file sorted.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> include/dt-bindings/power/qcom-rpmpd.h | 42 +++++++++++++++++-----------------
> 1 file changed, 21 insertions(+), 21 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 3/8] dt-bindings: power: qcom-rpmpd: add generic bindings for RPM power domains
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
2025-07-18 16:13 ` [PATCH 1/8] dt-bindings: power: qcom-rpmpd: split RPMh domains definitions Dmitry Baryshkov
2025-07-18 16:13 ` [PATCH 2/8] dt-bindings: power: qcom-rpmpd: sort out entries Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-29 16:00 ` Rob Herring (Arm)
2025-07-18 16:13 ` [PATCH 4/8] pmdomain: qcom: rpmpd: switch to RPMPD_* indices Dmitry Baryshkov
` (5 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
Some of the Qualcomm RPM PD controllers use a common set of indices for
power domains. Add generic indices for Qualcomm RPM power domain
controllers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
include/dt-bindings/power/qcom-rpmpd.h | 121 +++++++++++++++++++--------------
1 file changed, 70 insertions(+), 51 deletions(-)
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index 65f7d5ecc3521cfbc45d6158bd6143ea09f47302..4371ac941f29d9657b6573f4934658f100726224 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -6,18 +6,37 @@
#include <dt-bindings/power/qcom,rpmhpd.h>
+/* Generic RPM Power Domain Indexes */
+#define RPMPD_VDDCX 0
+#define RPMPD_VDDCX_AO 1
+/* VFC and VFL are mutually exclusive and can not be present on the same platform */
+#define RPMPD_VDDCX_VFC 2
+#define RPMPD_VDDCX_VFL 2
+#define RPMPD_VDDMX 3
+#define RPMPD_VDDMX_AO 4
+#define RPMPD_VDDMX_VFL 5
+#define RPMPD_SSCCX 6
+#define RPMPD_SSCCX_VFL 7
+#define RPMPD_SSCMX 8
+#define RPMPD_SSCMX_VFL 9
+
+/*
+ * Platform-specific power domain bindings. Don't add new entries here, use
+ * RPMPD_* above.
+ */
+
/* MDM9607 Power Domains */
-#define MDM9607_VDDCX 0
-#define MDM9607_VDDCX_AO 1
-#define MDM9607_VDDCX_VFL 2
-#define MDM9607_VDDMX 3
-#define MDM9607_VDDMX_AO 4
-#define MDM9607_VDDMX_VFL 5
+#define MDM9607_VDDCX RPMPD_VDDCX
+#define MDM9607_VDDCX_AO RPMPD_VDDCX_AO
+#define MDM9607_VDDCX_VFL RPMPD_VDDCX_VFL
+#define MDM9607_VDDMX RPMPD_VDDMX
+#define MDM9607_VDDMX_AO RPMPD_VDDMX_AO
+#define MDM9607_VDDMX_VFL RPMPD_VDDMX_VFL
/* MSM8226 Power Domain Indexes */
-#define MSM8226_VDDCX 0
-#define MSM8226_VDDCX_AO 1
-#define MSM8226_VDDCX_VFC 2
+#define MSM8226_VDDCX RPMPD_VDDCX
+#define MSM8226_VDDCX_AO RPMPD_VDDCX_AO
+#define MSM8226_VDDCX_VFC RPMPD_VDDCX_VFC
/* MSM8939 Power Domains */
#define MSM8939_VDDMDCX 0
@@ -30,11 +49,11 @@
#define MSM8939_VDDMX_AO 7
/* MSM8916 Power Domain Indexes */
-#define MSM8916_VDDCX 0
-#define MSM8916_VDDCX_AO 1
-#define MSM8916_VDDCX_VFC 2
-#define MSM8916_VDDMX 3
-#define MSM8916_VDDMX_AO 4
+#define MSM8916_VDDCX RPMPD_VDDCX
+#define MSM8916_VDDCX_AO RPMPD_VDDCX_AO
+#define MSM8916_VDDCX_VFC RPMPD_VDDCX_VFC
+#define MSM8916_VDDMX RPMPD_VDDMX
+#define MSM8916_VDDMX_AO RPMPD_VDDMX_AO
/* MSM8909 Power Domain Indexes */
#define MSM8909_VDDCX MSM8916_VDDCX
@@ -44,11 +63,11 @@
#define MSM8909_VDDMX_AO MSM8916_VDDMX_AO
/* MSM8917 Power Domain Indexes */
-#define MSM8917_VDDCX 0
-#define MSM8917_VDDCX_AO 1
-#define MSM8917_VDDCX_VFL 2
-#define MSM8917_VDDMX 3
-#define MSM8917_VDDMX_AO 4
+#define MSM8917_VDDCX RPMPD_VDDCX
+#define MSM8917_VDDCX_AO RPMPD_VDDCX_AO
+#define MSM8917_VDDCX_VFL RPMPD_VDDCX_VFL
+#define MSM8917_VDDMX RPMPD_VDDMX
+#define MSM8917_VDDMX_AO RPMPD_VDDMX_AO
/* MSM8937 Power Domain Indexes */
#define MSM8937_VDDCX MSM8917_VDDCX
@@ -81,12 +100,12 @@
#define MSM8974_VDDGFX_VFC 4
/* MSM8976 Power Domain Indexes */
-#define MSM8976_VDDCX 0
-#define MSM8976_VDDCX_AO 1
-#define MSM8976_VDDCX_VFL 2
-#define MSM8976_VDDMX 3
-#define MSM8976_VDDMX_AO 4
-#define MSM8976_VDDMX_VFL 5
+#define MSM8976_VDDCX RPMPD_VDDCX
+#define MSM8976_VDDCX_AO RPMPD_VDDCX_AO
+#define MSM8976_VDDCX_VFL RPMPD_VDDCX_VFL
+#define MSM8976_VDDMX RPMPD_VDDMX
+#define MSM8976_VDDMX_AO RPMPD_VDDMX_AO
+#define MSM8976_VDDMX_VFL RPMPD_VDDMX_VFL
/* MSM8994 Power Domain Indexes */
#define MSM8994_VDDCX 0
@@ -107,16 +126,16 @@
#define MSM8996_VDDSSCX_VFC 6
/* MSM8998 Power Domain Indexes */
-#define MSM8998_VDDCX 0
-#define MSM8998_VDDCX_AO 1
-#define MSM8998_VDDCX_VFL 2
-#define MSM8998_VDDMX 3
-#define MSM8998_VDDMX_AO 4
-#define MSM8998_VDDMX_VFL 5
-#define MSM8998_SSCCX 6
-#define MSM8998_SSCCX_VFL 7
-#define MSM8998_SSCMX 8
-#define MSM8998_SSCMX_VFL 9
+#define MSM8998_VDDCX RPMPD_VDDCX
+#define MSM8998_VDDCX_AO RPMPD_VDDCX_AO
+#define MSM8998_VDDCX_VFL RPMPD_VDDCX_VFL
+#define MSM8998_VDDMX RPMPD_VDDMX
+#define MSM8998_VDDMX_AO RPMPD_VDDMX_AO
+#define MSM8998_VDDMX_VFL RPMPD_VDDMX_VFL
+#define MSM8998_SSCCX RPMPD_SSCCX
+#define MSM8998_SSCCX_VFL RPMPD_SSCCX_VFL
+#define MSM8998_SSCMX RPMPD_SSCMX
+#define MSM8998_SSCMX_VFL RPMPD_SSCMX_VFL
/* QCM2290 Power Domains */
#define QCM2290_VDDCX 0
@@ -138,16 +157,16 @@
#define QCS404_LPIMX_VFL 6
/* SDM660 Power Domains */
-#define SDM660_VDDCX 0
-#define SDM660_VDDCX_AO 1
-#define SDM660_VDDCX_VFL 2
-#define SDM660_VDDMX 3
-#define SDM660_VDDMX_AO 4
-#define SDM660_VDDMX_VFL 5
-#define SDM660_SSCCX 6
-#define SDM660_SSCCX_VFL 7
-#define SDM660_SSCMX 8
-#define SDM660_SSCMX_VFL 9
+#define SDM660_VDDCX RPMPD_VDDCX
+#define SDM660_VDDCX_AO RPMPD_VDDCX_AO
+#define SDM660_VDDCX_VFL RPMPD_VDDCX_VFL
+#define SDM660_VDDMX RPMPD_VDDMX
+#define SDM660_VDDMX_AO RPMPD_VDDMX_AO
+#define SDM660_VDDMX_VFL RPMPD_VDDMX_VFL
+#define SDM660_SSCCX RPMPD_SSCCX
+#define SDM660_SSCCX_VFL RPMPD_SSCCX_VFL
+#define SDM660_SSCMX RPMPD_SSCMX
+#define SDM660_SSCMX_VFL RPMPD_SSCMX_VFL
/* SM6115 Power Domains */
#define SM6115_VDDCX 0
@@ -160,12 +179,12 @@
#define SM6115_VDD_LPI_MX 7
/* SM6125 Power Domains */
-#define SM6125_VDDCX 0
-#define SM6125_VDDCX_AO 1
-#define SM6125_VDDCX_VFL 2
-#define SM6125_VDDMX 3
-#define SM6125_VDDMX_AO 4
-#define SM6125_VDDMX_VFL 5
+#define SM6125_VDDCX RPMPD_VDDCX
+#define SM6125_VDDCX_AO RPMPD_VDDCX_AO
+#define SM6125_VDDCX_VFL RPMPD_VDDCX_VFL
+#define SM6125_VDDMX RPMPD_VDDMX
+#define SM6125_VDDMX_AO RPMPD_VDDMX_AO
+#define SM6125_VDDMX_VFL RPMPD_VDDMX_VFL
/* SM6375 Power Domain Indexes */
#define SM6375_VDDCX 0
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 3/8] dt-bindings: power: qcom-rpmpd: add generic bindings for RPM power domains
2025-07-18 16:13 ` [PATCH 3/8] dt-bindings: power: qcom-rpmpd: add generic bindings for RPM power domains Dmitry Baryshkov
@ 2025-07-29 16:00 ` Rob Herring (Arm)
0 siblings, 0 replies; 17+ messages in thread
From: Rob Herring (Arm) @ 2025-07-29 16:00 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Krzysztof Kozlowski, Konrad Dybcio, linux-arm-msm, linux-pm,
Conor Dooley, linux-kernel, Ulf Hansson, devicetree,
Bjorn Andersson
On Fri, 18 Jul 2025 19:13:41 +0300, Dmitry Baryshkov wrote:
> Some of the Qualcomm RPM PD controllers use a common set of indices for
> power domains. Add generic indices for Qualcomm RPM power domain
> controllers.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> include/dt-bindings/power/qcom-rpmpd.h | 121 +++++++++++++++++++--------------
> 1 file changed, 70 insertions(+), 51 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 4/8] pmdomain: qcom: rpmpd: switch to RPMPD_* indices
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
` (2 preceding siblings ...)
2025-07-18 16:13 ` [PATCH 3/8] dt-bindings: power: qcom-rpmpd: add generic bindings for RPM power domains Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-18 16:13 ` [PATCH 5/8] arm64: dts: qcom: dts: " Dmitry Baryshkov
` (4 subsequent siblings)
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
Use generic RPMPD_* defines for power domain instead of using
platform-specific defines for the platforms that use shared indices.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/pmdomain/qcom/rpmpd.c | 112 +++++++++++++++++++++---------------------
1 file changed, 56 insertions(+), 56 deletions(-)
diff --git a/drivers/pmdomain/qcom/rpmpd.c b/drivers/pmdomain/qcom/rpmpd.c
index 833c46944600faa641d44ebe85db17280bb927b1..f8580ec0f73785544aeb6f686438f39b477d134d 100644
--- a/drivers/pmdomain/qcom/rpmpd.c
+++ b/drivers/pmdomain/qcom/rpmpd.c
@@ -631,12 +631,12 @@ static struct rpmpd ssc_mx_rwsm0_vfl = {
};
static struct rpmpd *mdm9607_rpmpds[] = {
- [MDM9607_VDDCX] = &cx_s3a_lvl,
- [MDM9607_VDDCX_AO] = &cx_s3a_lvl_ao,
- [MDM9607_VDDCX_VFL] = &cx_s3a_vfl,
- [MDM9607_VDDMX] = &mx_l12a_lvl,
- [MDM9607_VDDMX_AO] = &mx_l12a_lvl_ao,
- [MDM9607_VDDMX_VFL] = &mx_l12a_vfl,
+ [RPMPD_VDDCX] = &cx_s3a_lvl,
+ [RPMPD_VDDCX_AO] = &cx_s3a_lvl_ao,
+ [RPMPD_VDDCX_VFL] = &cx_s3a_vfl,
+ [RPMPD_VDDMX] = &mx_l12a_lvl,
+ [RPMPD_VDDMX_AO] = &mx_l12a_lvl_ao,
+ [RPMPD_VDDMX_VFL] = &mx_l12a_vfl,
};
static const struct rpmpd_desc mdm9607_desc = {
@@ -646,9 +646,9 @@ static const struct rpmpd_desc mdm9607_desc = {
};
static struct rpmpd *msm8226_rpmpds[] = {
- [MSM8226_VDDCX] = &cx_s1a_corner,
- [MSM8226_VDDCX_AO] = &cx_s1a_corner_ao,
- [MSM8226_VDDCX_VFC] = &cx_s1a_vfc,
+ [RPMPD_VDDCX] = &cx_s1a_corner,
+ [RPMPD_VDDCX_AO] = &cx_s1a_corner_ao,
+ [RPMPD_VDDCX_VFC] = &cx_s1a_vfc,
};
static const struct rpmpd_desc msm8226_desc = {
@@ -675,11 +675,11 @@ static const struct rpmpd_desc msm8939_desc = {
};
static struct rpmpd *msm8916_rpmpds[] = {
- [MSM8916_VDDCX] = &cx_s1a_corner,
- [MSM8916_VDDCX_AO] = &cx_s1a_corner_ao,
- [MSM8916_VDDCX_VFC] = &cx_s1a_vfc,
- [MSM8916_VDDMX] = &mx_l3a_corner,
- [MSM8916_VDDMX_AO] = &mx_l3a_corner_ao,
+ [RPMPD_VDDCX] = &cx_s1a_corner,
+ [RPMPD_VDDCX_AO] = &cx_s1a_corner_ao,
+ [RPMPD_VDDCX_VFC] = &cx_s1a_vfc,
+ [RPMPD_VDDMX] = &mx_l3a_corner,
+ [RPMPD_VDDMX_AO] = &mx_l3a_corner_ao,
};
static const struct rpmpd_desc msm8916_desc = {
@@ -689,11 +689,11 @@ static const struct rpmpd_desc msm8916_desc = {
};
static struct rpmpd *msm8917_rpmpds[] = {
- [MSM8917_VDDCX] = &cx_s2a_lvl,
- [MSM8917_VDDCX_AO] = &cx_s2a_lvl_ao,
- [MSM8917_VDDCX_VFL] = &cx_s2a_vfl,
- [MSM8917_VDDMX] = &mx_l3a_lvl,
- [MSM8917_VDDMX_AO] = &mx_l3a_lvl_ao,
+ [RPMPD_VDDCX] = &cx_s2a_lvl,
+ [RPMPD_VDDCX_AO] = &cx_s2a_lvl_ao,
+ [RPMPD_VDDCX_VFL] = &cx_s2a_vfl,
+ [RPMPD_VDDMX] = &mx_l3a_lvl,
+ [RPMPD_VDDMX_AO] = &mx_l3a_lvl_ao,
};
static const struct rpmpd_desc msm8917_desc = {
@@ -747,12 +747,12 @@ static const struct rpmpd_desc msm8974pro_pma8084_desc = {
};
static struct rpmpd *msm8976_rpmpds[] = {
- [MSM8976_VDDCX] = &cx_s2a_lvl,
- [MSM8976_VDDCX_AO] = &cx_s2a_lvl_ao,
- [MSM8976_VDDCX_VFL] = &cx_rwsc2_vfl,
- [MSM8976_VDDMX] = &mx_s6a_lvl,
- [MSM8976_VDDMX_AO] = &mx_s6a_lvl_ao,
- [MSM8976_VDDMX_VFL] = &mx_rwsm6_vfl,
+ [RPMPD_VDDCX] = &cx_s2a_lvl,
+ [RPMPD_VDDCX_AO] = &cx_s2a_lvl_ao,
+ [RPMPD_VDDCX_VFL] = &cx_rwsc2_vfl,
+ [RPMPD_VDDMX] = &mx_s6a_lvl,
+ [RPMPD_VDDMX_AO] = &mx_s6a_lvl_ao,
+ [RPMPD_VDDMX_VFL] = &mx_rwsm6_vfl,
};
static const struct rpmpd_desc msm8976_desc = {
@@ -796,16 +796,16 @@ static const struct rpmpd_desc msm8996_desc = {
};
static struct rpmpd *msm8998_rpmpds[] = {
- [MSM8998_VDDCX] = &cx_rwcx0_lvl,
- [MSM8998_VDDCX_AO] = &cx_rwcx0_lvl_ao,
- [MSM8998_VDDCX_VFL] = &cx_rwcx0_vfl,
- [MSM8998_VDDMX] = &mx_rwmx0_lvl,
- [MSM8998_VDDMX_AO] = &mx_rwmx0_lvl_ao,
- [MSM8998_VDDMX_VFL] = &mx_rwmx0_vfl,
- [MSM8998_SSCCX] = &ssc_cx_rwsc0_lvl,
- [MSM8998_SSCCX_VFL] = &ssc_cx_rwsc0_vfl,
- [MSM8998_SSCMX] = &ssc_mx_rwsm0_lvl,
- [MSM8998_SSCMX_VFL] = &ssc_mx_rwsm0_vfl,
+ [RPMPD_VDDCX] = &cx_rwcx0_lvl,
+ [RPMPD_VDDCX_AO] = &cx_rwcx0_lvl_ao,
+ [RPMPD_VDDCX_VFL] = &cx_rwcx0_vfl,
+ [RPMPD_VDDMX] = &mx_rwmx0_lvl,
+ [RPMPD_VDDMX_AO] = &mx_rwmx0_lvl_ao,
+ [RPMPD_VDDMX_VFL] = &mx_rwmx0_vfl,
+ [RPMPD_SSCCX] = &ssc_cx_rwsc0_lvl,
+ [RPMPD_SSCCX_VFL] = &ssc_cx_rwsc0_vfl,
+ [RPMPD_SSCMX] = &ssc_mx_rwsm0_lvl,
+ [RPMPD_SSCMX_VFL] = &ssc_mx_rwsm0_vfl,
};
static const struct rpmpd_desc msm8998_desc = {
@@ -831,11 +831,11 @@ static const struct rpmpd_desc qcs404_desc = {
};
static struct rpmpd *qm215_rpmpds[] = {
- [QM215_VDDCX] = &cx_s1a_lvl,
- [QM215_VDDCX_AO] = &cx_s1a_lvl_ao,
- [QM215_VDDCX_VFL] = &cx_s1a_vfl,
- [QM215_VDDMX] = &mx_l2a_lvl,
- [QM215_VDDMX_AO] = &mx_l2a_lvl_ao,
+ [RPMPD_VDDCX] = &cx_s1a_lvl,
+ [RPMPD_VDDCX_AO] = &cx_s1a_lvl_ao,
+ [RPMPD_VDDCX_VFL] = &cx_s1a_vfl,
+ [RPMPD_VDDMX] = &mx_l2a_lvl,
+ [RPMPD_VDDMX_AO] = &mx_l2a_lvl_ao,
};
static const struct rpmpd_desc qm215_desc = {
@@ -845,16 +845,16 @@ static const struct rpmpd_desc qm215_desc = {
};
static struct rpmpd *sdm660_rpmpds[] = {
- [SDM660_VDDCX] = &cx_rwcx0_lvl,
- [SDM660_VDDCX_AO] = &cx_rwcx0_lvl_ao,
- [SDM660_VDDCX_VFL] = &cx_rwcx0_vfl,
- [SDM660_VDDMX] = &mx_rwmx0_lvl,
- [SDM660_VDDMX_AO] = &mx_rwmx0_lvl_ao,
- [SDM660_VDDMX_VFL] = &mx_rwmx0_vfl,
- [SDM660_SSCCX] = &ssc_cx_rwlc0_lvl,
- [SDM660_SSCCX_VFL] = &ssc_cx_rwlc0_vfl,
- [SDM660_SSCMX] = &ssc_mx_rwlm0_lvl,
- [SDM660_SSCMX_VFL] = &ssc_mx_rwlm0_vfl,
+ [RPMPD_VDDCX] = &cx_rwcx0_lvl,
+ [RPMPD_VDDCX_AO] = &cx_rwcx0_lvl_ao,
+ [RPMPD_VDDCX_VFL] = &cx_rwcx0_vfl,
+ [RPMPD_VDDMX] = &mx_rwmx0_lvl,
+ [RPMPD_VDDMX_AO] = &mx_rwmx0_lvl_ao,
+ [RPMPD_VDDMX_VFL] = &mx_rwmx0_vfl,
+ [RPMPD_SSCCX] = &ssc_cx_rwlc0_lvl,
+ [RPMPD_SSCCX_VFL] = &ssc_cx_rwlc0_vfl,
+ [RPMPD_SSCMX] = &ssc_mx_rwlm0_lvl,
+ [RPMPD_SSCMX_VFL] = &ssc_mx_rwlm0_vfl,
};
static const struct rpmpd_desc sdm660_desc = {
@@ -881,12 +881,12 @@ static const struct rpmpd_desc sm6115_desc = {
};
static struct rpmpd *sm6125_rpmpds[] = {
- [SM6125_VDDCX] = &cx_rwcx0_lvl,
- [SM6125_VDDCX_AO] = &cx_rwcx0_lvl_ao,
- [SM6125_VDDCX_VFL] = &cx_rwcx0_vfl,
- [SM6125_VDDMX] = &mx_rwmx0_lvl,
- [SM6125_VDDMX_AO] = &mx_rwmx0_lvl_ao,
- [SM6125_VDDMX_VFL] = &mx_rwmx0_vfl,
+ [RPMPD_VDDCX] = &cx_rwcx0_lvl,
+ [RPMPD_VDDCX_AO] = &cx_rwcx0_lvl_ao,
+ [RPMPD_VDDCX_VFL] = &cx_rwcx0_vfl,
+ [RPMPD_VDDMX] = &mx_rwmx0_lvl,
+ [RPMPD_VDDMX_AO] = &mx_rwmx0_lvl_ao,
+ [RPMPD_VDDMX_VFL] = &mx_rwmx0_vfl,
};
static const struct rpmpd_desc sm6125_desc = {
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH 5/8] arm64: dts: qcom: dts: switch to RPMPD_* indices
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
` (3 preceding siblings ...)
2025-07-18 16:13 ` [PATCH 4/8] pmdomain: qcom: rpmpd: switch to RPMPD_* indices Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-20 3:36 ` Bjorn Andersson
2025-07-18 16:13 ` [PATCH 6/8] ARM: " Dmitry Baryshkov
` (3 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
Use generic RPMPD_* defines for power domain instead of using
platform-specific defines.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 ++++----
arch/arm64/boot/dts/qcom/msm8917.dtsi | 10 +++++-----
arch/arm64/boot/dts/qcom/msm8976.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/msm8998.dtsi | 16 ++++++++--------
arch/arm64/boot/dts/qcom/sdm630.dtsi | 16 ++++++++--------
arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 ++++++------
6 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index b50c7e6e0bfcd35ab4f8b84aeabe214fd60e8d7c..ca184ee3af065df0dfb3c7106d29360a860b8b36 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1943,8 +1943,8 @@ mpss: remoteproc@4080000 {
interrupt-names = "wdog", "fatal", "ready",
"handover", "stop-ack";
- power-domains = <&rpmpd MSM8916_VDDCX>,
- <&rpmpd MSM8916_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>,
+ <&rpmpd RPMPD_VDDMX>;
power-domain-names = "cx", "mx";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
@@ -2445,8 +2445,8 @@ wcnss: remoteproc@a204000 {
<&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
- power-domains = <&rpmpd MSM8916_VDDCX>,
- <&rpmpd MSM8916_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>,
+ <&rpmpd RPMPD_VDDMX>;
power-domain-names = "cx", "mx";
qcom,smem-states = <&wcnss_smp2p_out 0>;
diff --git a/arch/arm64/boot/dts/qcom/msm8917.dtsi b/arch/arm64/boot/dts/qcom/msm8917.dtsi
index 8a642fce2e40d6d252a1cfbdfed602e6789ef09a..87dfc1e7e131cd4192ffbdd4913f934af17c5c88 100644
--- a/arch/arm64/boot/dts/qcom/msm8917.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8917.dtsi
@@ -1070,7 +1070,7 @@ mdss_dsi0: dsi@1a94000 {
phys = <&mdss_dsi0_phy>;
operating-points-v2 = <&mdss_dsi0_opp_table>;
- power-domains = <&rpmpd MSM8917_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1288,7 +1288,7 @@ sdhc_1: mmc@7824900 {
pinctrl-0 = <&sdc1_default>;
pinctrl-1 = <&sdc1_sleep>;
pinctrl-names = "default", "sleep";
- power-domains = <&rpmpd MSM8917_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
mmc-ddr-1_8v;
@@ -1313,7 +1313,7 @@ sdhc_2: mmc@7864900 {
pinctrl-0 = <&sdc2_default>;
pinctrl-1 = <&sdc2_sleep>;
pinctrl-names = "default", "sleep";
- power-domains = <&rpmpd MSM8917_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
bus-width = <4>;
status = "disabled";
};
@@ -1517,8 +1517,8 @@ wcnss: remoteproc@a204000 {
<&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
- power-domains = <&rpmpd MSM8917_VDDCX>,
- <&rpmpd MSM8917_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>,
+ <&rpmpd RPMPD_VDDMX>;
power-domain-names = "cx", "mx";
qcom,smem-states = <&wcnss_smp2p_out 0>;
diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
index f9962512f243d6c1af4931787f4602554c63bb39..80a0a09e055d79c5e56f89e5d67baf9971d87069 100644
--- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
@@ -1558,8 +1558,8 @@ wcnss: remoteproc@a204000 {
"handover",
"stop-ack";
- power-domains = <&rpmpd MSM8976_VDDCX>,
- <&rpmpd MSM8976_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>,
+ <&rpmpd RPMPD_VDDMX>;
power-domain-names = "cx", "mx";
qcom,smem-states = <&wcnss_smp2p_out 0>;
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 0b0a9379cb05b01ebb17cef9fe7d22d56790efd3..2d7c45fec94e868b41a2b8d7acf8175a7b02c0b7 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1497,8 +1497,8 @@ remoteproc_mss: remoteproc@4080000 {
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
- power-domains = <&rpmpd MSM8998_VDDCX>,
- <&rpmpd MSM8998_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>,
+ <&rpmpd RPMPD_VDDMX>;
power-domain-names = "cx", "mx";
status = "disabled";
@@ -1544,7 +1544,7 @@ adreno_gpu: gpu@5000000 {
interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&adreno_smmu 0>;
operating-points-v2 = <&gpu_opp_table>;
- power-domains = <&rpmpd MSM8998_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDMX>;
status = "disabled";
gpu_opp_table: opp-table {
@@ -1680,7 +1680,7 @@ remoteproc_slpi: remoteproc@5800000 {
qcom,smem-states = <&slpi_smp2p_out 0>;
qcom,smem-state-names = "stop";
- power-domains = <&rpmpd MSM8998_SSCCX>;
+ power-domains = <&rpmpd RPMPD_SSCCX>;
power-domain-names = "ssc_cx";
status = "disabled";
@@ -2871,7 +2871,7 @@ mdss_mdp: display-controller@c901000 {
assigned-clock-rates = <19200000>;
operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd MSM8998_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDMX>;
mdp_opp_table: opp-table {
compatible = "operating-points-v2";
@@ -2953,7 +2953,7 @@ mdss_dsi0: dsi@c994000 {
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmpd MSM8998_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
phys = <&mdss_dsi0_phy>;
phy-names = "dsi";
@@ -3029,7 +3029,7 @@ mdss_dsi1: dsi@c996000 {
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmpd MSM8998_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
phys = <&mdss_dsi1_phy>;
phy-names = "dsi";
@@ -3277,7 +3277,7 @@ remoteproc_adsp: remoteproc@17300000 {
qcom,smem-states = <&adsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
- power-domains = <&rpmpd MSM8998_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
power-domain-names = "cx";
status = "disabled";
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 8b1a45a4e56ed1ae02e5bb6e78ca6255d87add1c..412d7f7d6de67008c1f406ac5a73a51ff7f4f98d 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1058,8 +1058,8 @@ remoteproc_mss: remoteproc@4080000 {
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
- power-domains = <&rpmpd SDM660_VDDCX>,
- <&rpmpd SDM660_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>,
+ <&rpmpd RPMPD_VDDMX>;
power-domain-names = "cx", "mx";
memory-region = <&mba_region>, <&mpss_region>, <&mdata_mem>;
@@ -1096,7 +1096,7 @@ adreno_gpu: gpu@5000000 {
"rbcpr",
"core";
- power-domains = <&rpmpd SDM660_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDMX>;
iommus = <&kgsl_smmu 0>;
nvmem-cells = <&gpu_speed_bin>;
@@ -1396,7 +1396,7 @@ sdhc_2: mmc@c084000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_state_on>;
pinctrl-1 = <&sdc2_state_off>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
status = "disabled";
@@ -1450,7 +1450,7 @@ sdhc_1: mmc@c0c4000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_state_on>;
pinctrl-1 = <&sdc1_state_off>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
bus-width = <8>;
non-removable;
@@ -1612,7 +1612,7 @@ mdp: display-controller@c901000 {
"rotator-mem";
iommus = <&mmss_smmu 0>;
operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
ports {
#address-cells = <1>;
@@ -1664,7 +1664,7 @@ mdss_dsi0: dsi@c994000 {
reg-names = "dsi_ctrl";
operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
interrupt-parent = <&mdss>;
interrupts = <4>;
@@ -2280,7 +2280,7 @@ adsp_pil: remoteproc@15700000 {
clock-names = "xo";
memory-region = <&adsp_region>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
power-domain-names = "cx";
qcom,smem-states = <&adsp_smp2p_out 0>;
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 8f2d65543373e70b48b4015478e21e8e74fd23c9..80c42dff5399b7c60576c2b6cf79afdbd8b9b1d4 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -724,7 +724,7 @@ sdhc_1: mmc@4744000 {
clock-names = "iface", "core", "xo";
iommus = <&apps_smmu 0x160 0x0>;
- power-domains = <&rpmpd SM6125_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
qcom,dll-config = <0x000f642c>;
qcom,ddr-config = <0x80040873>;
@@ -755,7 +755,7 @@ sdhc_2: mmc@4784000 {
pinctrl-1 = <&sdc2_off_state>;
pinctrl-names = "default", "sleep";
- power-domains = <&rpmpd SM6125_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
qcom,dll-config = <0x0007642c>;
qcom,ddr-config = <0x80040873>;
@@ -1275,7 +1275,7 @@ mdss_mdp: display-controller@5e01000 {
assigned-clock-rates = <19200000>;
operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd SM6125_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
ports {
#address-cells = <1>;
@@ -1345,7 +1345,7 @@ mdss_dsi0: dsi@5e94000 {
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmpd SM6125_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
phys = <&mdss_dsi0_phy>;
phy-names = "dsi";
@@ -1406,7 +1406,7 @@ mdss_dsi0_phy: phy@5e94400 {
"ref";
required-opps = <&rpmpd_opp_nom>;
- power-domains = <&rpmpd SM6125_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDMX>;
status = "disabled";
};
@@ -1434,7 +1434,7 @@ dispcc: clock-controller@5f00000 {
"gcc_disp_gpll0_div_clk_src";
required-opps = <&rpmpd_opp_ret>;
- power-domains = <&rpmpd SM6125_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
#clock-cells = <1>;
#power-domain-cells = <1>;
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 5/8] arm64: dts: qcom: dts: switch to RPMPD_* indices
2025-07-18 16:13 ` [PATCH 5/8] arm64: dts: qcom: dts: " Dmitry Baryshkov
@ 2025-07-20 3:36 ` Bjorn Andersson
0 siblings, 0 replies; 17+ messages in thread
From: Bjorn Andersson @ 2025-07-20 3:36 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, linux-pm
On Fri, Jul 18, 2025 at 07:13:43PM +0300, Dmitry Baryshkov wrote:
> Use generic RPMPD_* defines for power domain instead of using
> platform-specific defines.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 ++++----
> arch/arm64/boot/dts/qcom/msm8917.dtsi | 10 +++++-----
> arch/arm64/boot/dts/qcom/msm8976.dtsi | 4 ++--
> arch/arm64/boot/dts/qcom/msm8998.dtsi | 16 ++++++++--------
> arch/arm64/boot/dts/qcom/sdm630.dtsi | 16 ++++++++--------
> arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 ++++++------
> 6 files changed, 33 insertions(+), 33 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index b50c7e6e0bfcd35ab4f8b84aeabe214fd60e8d7c..ca184ee3af065df0dfb3c7106d29360a860b8b36 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1943,8 +1943,8 @@ mpss: remoteproc@4080000 {
> interrupt-names = "wdog", "fatal", "ready",
> "handover", "stop-ack";
>
> - power-domains = <&rpmpd MSM8916_VDDCX>,
> - <&rpmpd MSM8916_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>,
> + <&rpmpd RPMPD_VDDMX>;
> power-domain-names = "cx", "mx";
>
> clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
> @@ -2445,8 +2445,8 @@ wcnss: remoteproc@a204000 {
> <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
> interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
>
> - power-domains = <&rpmpd MSM8916_VDDCX>,
> - <&rpmpd MSM8916_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>,
> + <&rpmpd RPMPD_VDDMX>;
> power-domain-names = "cx", "mx";
>
> qcom,smem-states = <&wcnss_smp2p_out 0>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8917.dtsi b/arch/arm64/boot/dts/qcom/msm8917.dtsi
> index 8a642fce2e40d6d252a1cfbdfed602e6789ef09a..87dfc1e7e131cd4192ffbdd4913f934af17c5c88 100644
> --- a/arch/arm64/boot/dts/qcom/msm8917.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8917.dtsi
> @@ -1070,7 +1070,7 @@ mdss_dsi0: dsi@1a94000 {
> phys = <&mdss_dsi0_phy>;
>
> operating-points-v2 = <&mdss_dsi0_opp_table>;
> - power-domains = <&rpmpd MSM8917_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -1288,7 +1288,7 @@ sdhc_1: mmc@7824900 {
> pinctrl-0 = <&sdc1_default>;
> pinctrl-1 = <&sdc1_sleep>;
> pinctrl-names = "default", "sleep";
> - power-domains = <&rpmpd MSM8917_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
> mmc-hs200-1_8v;
> mmc-hs400-1_8v;
> mmc-ddr-1_8v;
> @@ -1313,7 +1313,7 @@ sdhc_2: mmc@7864900 {
> pinctrl-0 = <&sdc2_default>;
> pinctrl-1 = <&sdc2_sleep>;
> pinctrl-names = "default", "sleep";
> - power-domains = <&rpmpd MSM8917_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
> bus-width = <4>;
> status = "disabled";
> };
> @@ -1517,8 +1517,8 @@ wcnss: remoteproc@a204000 {
> <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
> interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
>
> - power-domains = <&rpmpd MSM8917_VDDCX>,
> - <&rpmpd MSM8917_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>,
> + <&rpmpd RPMPD_VDDMX>;
> power-domain-names = "cx", "mx";
>
> qcom,smem-states = <&wcnss_smp2p_out 0>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> index f9962512f243d6c1af4931787f4602554c63bb39..80a0a09e055d79c5e56f89e5d67baf9971d87069 100644
> --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> @@ -1558,8 +1558,8 @@ wcnss: remoteproc@a204000 {
> "handover",
> "stop-ack";
>
> - power-domains = <&rpmpd MSM8976_VDDCX>,
> - <&rpmpd MSM8976_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>,
> + <&rpmpd RPMPD_VDDMX>;
> power-domain-names = "cx", "mx";
>
> qcom,smem-states = <&wcnss_smp2p_out 0>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index 0b0a9379cb05b01ebb17cef9fe7d22d56790efd3..2d7c45fec94e868b41a2b8d7acf8175a7b02c0b7 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -1497,8 +1497,8 @@ remoteproc_mss: remoteproc@4080000 {
>
> qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
>
> - power-domains = <&rpmpd MSM8998_VDDCX>,
> - <&rpmpd MSM8998_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>,
> + <&rpmpd RPMPD_VDDMX>;
> power-domain-names = "cx", "mx";
>
> status = "disabled";
> @@ -1544,7 +1544,7 @@ adreno_gpu: gpu@5000000 {
> interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
> iommus = <&adreno_smmu 0>;
> operating-points-v2 = <&gpu_opp_table>;
> - power-domains = <&rpmpd MSM8998_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDMX>;
> status = "disabled";
>
> gpu_opp_table: opp-table {
> @@ -1680,7 +1680,7 @@ remoteproc_slpi: remoteproc@5800000 {
> qcom,smem-states = <&slpi_smp2p_out 0>;
> qcom,smem-state-names = "stop";
>
> - power-domains = <&rpmpd MSM8998_SSCCX>;
> + power-domains = <&rpmpd RPMPD_SSCCX>;
> power-domain-names = "ssc_cx";
>
> status = "disabled";
> @@ -2871,7 +2871,7 @@ mdss_mdp: display-controller@c901000 {
> assigned-clock-rates = <19200000>;
>
> operating-points-v2 = <&mdp_opp_table>;
> - power-domains = <&rpmpd MSM8998_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDMX>;
>
> mdp_opp_table: opp-table {
> compatible = "operating-points-v2";
> @@ -2953,7 +2953,7 @@ mdss_dsi0: dsi@c994000 {
> <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
>
> operating-points-v2 = <&dsi_opp_table>;
> - power-domains = <&rpmpd MSM8998_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> phys = <&mdss_dsi0_phy>;
> phy-names = "dsi";
> @@ -3029,7 +3029,7 @@ mdss_dsi1: dsi@c996000 {
> <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
>
> operating-points-v2 = <&dsi_opp_table>;
> - power-domains = <&rpmpd MSM8998_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> phys = <&mdss_dsi1_phy>;
> phy-names = "dsi";
> @@ -3277,7 +3277,7 @@ remoteproc_adsp: remoteproc@17300000 {
> qcom,smem-states = <&adsp_smp2p_out 0>;
> qcom,smem-state-names = "stop";
>
> - power-domains = <&rpmpd MSM8998_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
> power-domain-names = "cx";
>
> status = "disabled";
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 8b1a45a4e56ed1ae02e5bb6e78ca6255d87add1c..412d7f7d6de67008c1f406ac5a73a51ff7f4f98d 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -1058,8 +1058,8 @@ remoteproc_mss: remoteproc@4080000 {
>
> qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
>
> - power-domains = <&rpmpd SDM660_VDDCX>,
> - <&rpmpd SDM660_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>,
> + <&rpmpd RPMPD_VDDMX>;
> power-domain-names = "cx", "mx";
>
> memory-region = <&mba_region>, <&mpss_region>, <&mdata_mem>;
> @@ -1096,7 +1096,7 @@ adreno_gpu: gpu@5000000 {
> "rbcpr",
> "core";
>
> - power-domains = <&rpmpd SDM660_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDMX>;
> iommus = <&kgsl_smmu 0>;
>
> nvmem-cells = <&gpu_speed_bin>;
> @@ -1396,7 +1396,7 @@ sdhc_2: mmc@c084000 {
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&sdc2_state_on>;
> pinctrl-1 = <&sdc2_state_off>;
> - power-domains = <&rpmpd SDM660_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> status = "disabled";
>
> @@ -1450,7 +1450,7 @@ sdhc_1: mmc@c0c4000 {
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&sdc1_state_on>;
> pinctrl-1 = <&sdc1_state_off>;
> - power-domains = <&rpmpd SDM660_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> bus-width = <8>;
> non-removable;
> @@ -1612,7 +1612,7 @@ mdp: display-controller@c901000 {
> "rotator-mem";
> iommus = <&mmss_smmu 0>;
> operating-points-v2 = <&mdp_opp_table>;
> - power-domains = <&rpmpd SDM660_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> ports {
> #address-cells = <1>;
> @@ -1664,7 +1664,7 @@ mdss_dsi0: dsi@c994000 {
> reg-names = "dsi_ctrl";
>
> operating-points-v2 = <&dsi_opp_table>;
> - power-domains = <&rpmpd SDM660_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> interrupt-parent = <&mdss>;
> interrupts = <4>;
> @@ -2280,7 +2280,7 @@ adsp_pil: remoteproc@15700000 {
> clock-names = "xo";
>
> memory-region = <&adsp_region>;
> - power-domains = <&rpmpd SDM660_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
> power-domain-names = "cx";
>
> qcom,smem-states = <&adsp_smp2p_out 0>;
> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> index 8f2d65543373e70b48b4015478e21e8e74fd23c9..80c42dff5399b7c60576c2b6cf79afdbd8b9b1d4 100644
> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
> @@ -724,7 +724,7 @@ sdhc_1: mmc@4744000 {
> clock-names = "iface", "core", "xo";
> iommus = <&apps_smmu 0x160 0x0>;
>
> - power-domains = <&rpmpd SM6125_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> qcom,dll-config = <0x000f642c>;
> qcom,ddr-config = <0x80040873>;
> @@ -755,7 +755,7 @@ sdhc_2: mmc@4784000 {
> pinctrl-1 = <&sdc2_off_state>;
> pinctrl-names = "default", "sleep";
>
> - power-domains = <&rpmpd SM6125_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> qcom,dll-config = <0x0007642c>;
> qcom,ddr-config = <0x80040873>;
> @@ -1275,7 +1275,7 @@ mdss_mdp: display-controller@5e01000 {
> assigned-clock-rates = <19200000>;
>
> operating-points-v2 = <&mdp_opp_table>;
> - power-domains = <&rpmpd SM6125_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> ports {
> #address-cells = <1>;
> @@ -1345,7 +1345,7 @@ mdss_dsi0: dsi@5e94000 {
> <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
>
> operating-points-v2 = <&dsi_opp_table>;
> - power-domains = <&rpmpd SM6125_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> phys = <&mdss_dsi0_phy>;
> phy-names = "dsi";
> @@ -1406,7 +1406,7 @@ mdss_dsi0_phy: phy@5e94400 {
> "ref";
>
> required-opps = <&rpmpd_opp_nom>;
> - power-domains = <&rpmpd SM6125_VDDMX>;
> + power-domains = <&rpmpd RPMPD_VDDMX>;
>
> status = "disabled";
> };
> @@ -1434,7 +1434,7 @@ dispcc: clock-controller@5f00000 {
> "gcc_disp_gpll0_div_clk_src";
>
> required-opps = <&rpmpd_opp_ret>;
> - power-domains = <&rpmpd SM6125_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
>
> #clock-cells = <1>;
> #power-domain-cells = <1>;
>
> --
> 2.39.5
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 6/8] ARM: dts: qcom: dts: switch to RPMPD_* indices
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
` (4 preceding siblings ...)
2025-07-18 16:13 ` [PATCH 5/8] arm64: dts: qcom: dts: " Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-20 3:37 ` Bjorn Andersson
2025-07-18 16:13 ` [PATCH DO NOT MERGE 7/8] dt-bindings: power: qcom-rpmpd: drop compatibility defines Dmitry Baryshkov
` (2 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
Use generic RPMPD_* defines for power domain instead of using
platform-specific defines.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
index 51a7a3fb36d88eeb8dbccefbab672aceb1e46428..bcf14a3b13a1b4b3455ef4069df2f3d9c5c7f9ff 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
@@ -959,7 +959,7 @@ modem: remoteproc@fc880000 {
resets = <&gcc GCC_MSS_RESTART>;
reset-names = "mss_restart";
- power-domains = <&rpmpd MSM8226_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
power-domain-names = "cx";
qcom,ext-bhs-reg = <&tcsr_regs_1 0x194>;
@@ -1372,7 +1372,7 @@ adsp: remoteproc@fe200000 {
<&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
- power-domains = <&rpmpd MSM8226_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
power-domain-names = "cx";
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 6/8] ARM: dts: qcom: dts: switch to RPMPD_* indices
2025-07-18 16:13 ` [PATCH 6/8] ARM: " Dmitry Baryshkov
@ 2025-07-20 3:37 ` Bjorn Andersson
0 siblings, 0 replies; 17+ messages in thread
From: Bjorn Andersson @ 2025-07-20 3:37 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, linux-pm
On Fri, Jul 18, 2025 at 07:13:44PM +0300, Dmitry Baryshkov wrote:
> Use generic RPMPD_* defines for power domain instead of using
> platform-specific defines.
>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Regards,
Bjorn
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
> index 51a7a3fb36d88eeb8dbccefbab672aceb1e46428..bcf14a3b13a1b4b3455ef4069df2f3d9c5c7f9ff 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
> @@ -959,7 +959,7 @@ modem: remoteproc@fc880000 {
> resets = <&gcc GCC_MSS_RESTART>;
> reset-names = "mss_restart";
>
> - power-domains = <&rpmpd MSM8226_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
> power-domain-names = "cx";
>
> qcom,ext-bhs-reg = <&tcsr_regs_1 0x194>;
> @@ -1372,7 +1372,7 @@ adsp: remoteproc@fe200000 {
> <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
> interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
>
> - power-domains = <&rpmpd MSM8226_VDDCX>;
> + power-domains = <&rpmpd RPMPD_VDDCX>;
> power-domain-names = "cx";
>
> clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
>
> --
> 2.39.5
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH DO NOT MERGE 7/8] dt-bindings: power: qcom-rpmpd: drop compatibility defines
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
` (5 preceding siblings ...)
2025-07-18 16:13 ` [PATCH 6/8] ARM: " Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-18 16:13 ` [PATCH DO NOT MERGE 8/8] dt-bindings: power: qcom,rpmhpd: drop duplicate defines Dmitry Baryshkov
2025-07-20 3:38 ` [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Bjorn Andersson
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
Now as all relevant platforms were converted to RPMPD_ defines, drop
compatibility defines from the qcom-rpmpd bindings.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
include/dt-bindings/power/qcom-rpmpd.h | 88 ----------------------------------
1 file changed, 88 deletions(-)
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index 4371ac941f29d9657b6573f4934658f100726224..5405efa4cb77e8e6d43168889c5c83927060b780 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -25,19 +25,6 @@
* RPMPD_* above.
*/
-/* MDM9607 Power Domains */
-#define MDM9607_VDDCX RPMPD_VDDCX
-#define MDM9607_VDDCX_AO RPMPD_VDDCX_AO
-#define MDM9607_VDDCX_VFL RPMPD_VDDCX_VFL
-#define MDM9607_VDDMX RPMPD_VDDMX
-#define MDM9607_VDDMX_AO RPMPD_VDDMX_AO
-#define MDM9607_VDDMX_VFL RPMPD_VDDMX_VFL
-
-/* MSM8226 Power Domain Indexes */
-#define MSM8226_VDDCX RPMPD_VDDCX
-#define MSM8226_VDDCX_AO RPMPD_VDDCX_AO
-#define MSM8226_VDDCX_VFC RPMPD_VDDCX_VFC
-
/* MSM8939 Power Domains */
#define MSM8939_VDDMDCX 0
#define MSM8939_VDDMDCX_AO 1
@@ -48,41 +35,6 @@
#define MSM8939_VDDMX 6
#define MSM8939_VDDMX_AO 7
-/* MSM8916 Power Domain Indexes */
-#define MSM8916_VDDCX RPMPD_VDDCX
-#define MSM8916_VDDCX_AO RPMPD_VDDCX_AO
-#define MSM8916_VDDCX_VFC RPMPD_VDDCX_VFC
-#define MSM8916_VDDMX RPMPD_VDDMX
-#define MSM8916_VDDMX_AO RPMPD_VDDMX_AO
-
-/* MSM8909 Power Domain Indexes */
-#define MSM8909_VDDCX MSM8916_VDDCX
-#define MSM8909_VDDCX_AO MSM8916_VDDCX_AO
-#define MSM8909_VDDCX_VFC MSM8916_VDDCX_VFC
-#define MSM8909_VDDMX MSM8916_VDDMX
-#define MSM8909_VDDMX_AO MSM8916_VDDMX_AO
-
-/* MSM8917 Power Domain Indexes */
-#define MSM8917_VDDCX RPMPD_VDDCX
-#define MSM8917_VDDCX_AO RPMPD_VDDCX_AO
-#define MSM8917_VDDCX_VFL RPMPD_VDDCX_VFL
-#define MSM8917_VDDMX RPMPD_VDDMX
-#define MSM8917_VDDMX_AO RPMPD_VDDMX_AO
-
-/* MSM8937 Power Domain Indexes */
-#define MSM8937_VDDCX MSM8917_VDDCX
-#define MSM8937_VDDCX_AO MSM8917_VDDCX_AO
-#define MSM8937_VDDCX_VFL MSM8917_VDDCX_VFL
-#define MSM8937_VDDMX MSM8917_VDDMX
-#define MSM8937_VDDMX_AO MSM8917_VDDMX_AO
-
-/* QM215 Power Domain Indexes */
-#define QM215_VDDCX MSM8917_VDDCX
-#define QM215_VDDCX_AO MSM8917_VDDCX_AO
-#define QM215_VDDCX_VFL MSM8917_VDDCX_VFL
-#define QM215_VDDMX MSM8917_VDDMX
-#define QM215_VDDMX_AO MSM8917_VDDMX_AO
-
/* MSM8953 Power Domain Indexes */
#define MSM8953_VDDMD 0
#define MSM8953_VDDMD_AO 1
@@ -99,14 +51,6 @@
#define MSM8974_VDDGFX 3
#define MSM8974_VDDGFX_VFC 4
-/* MSM8976 Power Domain Indexes */
-#define MSM8976_VDDCX RPMPD_VDDCX
-#define MSM8976_VDDCX_AO RPMPD_VDDCX_AO
-#define MSM8976_VDDCX_VFL RPMPD_VDDCX_VFL
-#define MSM8976_VDDMX RPMPD_VDDMX
-#define MSM8976_VDDMX_AO RPMPD_VDDMX_AO
-#define MSM8976_VDDMX_VFL RPMPD_VDDMX_VFL
-
/* MSM8994 Power Domain Indexes */
#define MSM8994_VDDCX 0
#define MSM8994_VDDCX_AO 1
@@ -125,18 +69,6 @@
#define MSM8996_VDDSSCX 5
#define MSM8996_VDDSSCX_VFC 6
-/* MSM8998 Power Domain Indexes */
-#define MSM8998_VDDCX RPMPD_VDDCX
-#define MSM8998_VDDCX_AO RPMPD_VDDCX_AO
-#define MSM8998_VDDCX_VFL RPMPD_VDDCX_VFL
-#define MSM8998_VDDMX RPMPD_VDDMX
-#define MSM8998_VDDMX_AO RPMPD_VDDMX_AO
-#define MSM8998_VDDMX_VFL RPMPD_VDDMX_VFL
-#define MSM8998_SSCCX RPMPD_SSCCX
-#define MSM8998_SSCCX_VFL RPMPD_SSCCX_VFL
-#define MSM8998_SSCMX RPMPD_SSCMX
-#define MSM8998_SSCMX_VFL RPMPD_SSCMX_VFL
-
/* QCM2290 Power Domains */
#define QCM2290_VDDCX 0
#define QCM2290_VDDCX_AO 1
@@ -156,18 +88,6 @@
#define QCS404_LPIMX 5
#define QCS404_LPIMX_VFL 6
-/* SDM660 Power Domains */
-#define SDM660_VDDCX RPMPD_VDDCX
-#define SDM660_VDDCX_AO RPMPD_VDDCX_AO
-#define SDM660_VDDCX_VFL RPMPD_VDDCX_VFL
-#define SDM660_VDDMX RPMPD_VDDMX
-#define SDM660_VDDMX_AO RPMPD_VDDMX_AO
-#define SDM660_VDDMX_VFL RPMPD_VDDMX_VFL
-#define SDM660_SSCCX RPMPD_SSCCX
-#define SDM660_SSCCX_VFL RPMPD_SSCCX_VFL
-#define SDM660_SSCMX RPMPD_SSCMX
-#define SDM660_SSCMX_VFL RPMPD_SSCMX_VFL
-
/* SM6115 Power Domains */
#define SM6115_VDDCX 0
#define SM6115_VDDCX_AO 1
@@ -178,14 +98,6 @@
#define SM6115_VDD_LPI_CX 6
#define SM6115_VDD_LPI_MX 7
-/* SM6125 Power Domains */
-#define SM6125_VDDCX RPMPD_VDDCX
-#define SM6125_VDDCX_AO RPMPD_VDDCX_AO
-#define SM6125_VDDCX_VFL RPMPD_VDDCX_VFL
-#define SM6125_VDDMX RPMPD_VDDMX
-#define SM6125_VDDMX_AO RPMPD_VDDMX_AO
-#define SM6125_VDDMX_VFL RPMPD_VDDMX_VFL
-
/* SM6375 Power Domain Indexes */
#define SM6375_VDDCX 0
#define SM6375_VDDCX_AO 1
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH DO NOT MERGE 8/8] dt-bindings: power: qcom,rpmhpd: drop duplicate defines
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
` (6 preceding siblings ...)
2025-07-18 16:13 ` [PATCH DO NOT MERGE 7/8] dt-bindings: power: qcom-rpmpd: drop compatibility defines Dmitry Baryshkov
@ 2025-07-18 16:13 ` Dmitry Baryshkov
2025-07-20 3:38 ` [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Bjorn Andersson
8 siblings, 0 replies; 17+ messages in thread
From: Dmitry Baryshkov @ 2025-07-18 16:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, devicetree, linux-kernel, linux-pm
In order to prevent further confusion, drop SoC-specific defines for
power domain indices for platforms which were converted to use
RPMHPD_foo indices.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
include/dt-bindings/power/qcom,rpmhpd.h | 58 ---------------------------------
1 file changed, 58 deletions(-)
diff --git a/include/dt-bindings/power/qcom,rpmhpd.h b/include/dt-bindings/power/qcom,rpmhpd.h
index 73cceb88953f705106486b7e111b3ffc39c85664..ccf47b4670d905b166a9a39badc3535c8f9a05bf 100644
--- a/include/dt-bindings/power/qcom,rpmhpd.h
+++ b/include/dt-bindings/power/qcom,rpmhpd.h
@@ -146,64 +146,6 @@
#define SA8155P_MX SM8150_MX
#define SA8155P_MX_AO SM8150_MX_AO
-/* SM8250 Power Domain Indexes */
-#define SM8250_CX 0
-#define SM8250_CX_AO 1
-#define SM8250_EBI 2
-#define SM8250_GFX 3
-#define SM8250_LCX 4
-#define SM8250_LMX 5
-#define SM8250_MMCX 6
-#define SM8250_MMCX_AO 7
-#define SM8250_MX 8
-#define SM8250_MX_AO 9
-
-/* SM8350 Power Domain Indexes */
-#define SM8350_CX 0
-#define SM8350_CX_AO 1
-#define SM8350_EBI 2
-#define SM8350_GFX 3
-#define SM8350_LCX 4
-#define SM8350_LMX 5
-#define SM8350_MMCX 6
-#define SM8350_MMCX_AO 7
-#define SM8350_MX 8
-#define SM8350_MX_AO 9
-#define SM8350_MXC 10
-#define SM8350_MXC_AO 11
-#define SM8350_MSS 12
-
-/* SM8450 Power Domain Indexes */
-#define SM8450_CX 0
-#define SM8450_CX_AO 1
-#define SM8450_EBI 2
-#define SM8450_GFX 3
-#define SM8450_LCX 4
-#define SM8450_LMX 5
-#define SM8450_MMCX 6
-#define SM8450_MMCX_AO 7
-#define SM8450_MX 8
-#define SM8450_MX_AO 9
-#define SM8450_MXC 10
-#define SM8450_MXC_AO 11
-#define SM8450_MSS 12
-
-/* SM8550 Power Domain Indexes */
-#define SM8550_CX 0
-#define SM8550_CX_AO 1
-#define SM8550_EBI 2
-#define SM8550_GFX 3
-#define SM8550_LCX 4
-#define SM8550_LMX 5
-#define SM8550_MMCX 6
-#define SM8550_MMCX_AO 7
-#define SM8550_MX 8
-#define SM8550_MX_AO 9
-#define SM8550_MXC 10
-#define SM8550_MXC_AO 11
-#define SM8550_MSS 12
-#define SM8550_NSP 13
-
/* QDU1000/QRU1000 Power Domain Indexes */
#define QDU1000_EBI 0
#define QDU1000_MSS 1
--
2.39.5
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices
2025-07-18 16:13 [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Dmitry Baryshkov
` (7 preceding siblings ...)
2025-07-18 16:13 ` [PATCH DO NOT MERGE 8/8] dt-bindings: power: qcom,rpmhpd: drop duplicate defines Dmitry Baryshkov
@ 2025-07-20 3:38 ` Bjorn Andersson
2025-08-19 12:26 ` Ulf Hansson
8 siblings, 1 reply; 17+ messages in thread
From: Bjorn Andersson @ 2025-07-20 3:38 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, linux-pm
On Fri, Jul 18, 2025 at 07:13:38PM +0300, Dmitry Baryshkov wrote:
> - Separate RPMh power domain bindings from RPM PD bindings
>
> - Drop now-unused (after [1] is merged) binding indices for RPMh
> platforms
>
> - Introduce generic bindings for RPM power domains controller
>
> Two last patches (marked as [DO NOT MERGE]) should only be merged after
> corresponding DT cleanup lands ([1] and DTS parts of this patchset).
>
Ulf, please feel free to pick the DT changes through your tree so we
don't need to wait a whole cycle.
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Regards,
Bjorn
> [1] https://lore.kernel.org/r/20250717-fix-rpmhpd-abi-v1-0-4c82e25e3280@oss.qualcomm.com
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> Dmitry Baryshkov (8):
> dt-bindings: power: qcom-rpmpd: split RPMh domains definitions
> dt-bindings: power: qcom-rpmpd: sort out entries
> dt-bindings: power: qcom-rpmpd: add generic bindings for RPM power domains
> pmdomain: qcom: rpmpd: switch to RPMPD_* indices
> arm64: dts: qcom: dts: switch to RPMPD_* indices
> ARM: dts: qcom: dts: switch to RPMPD_* indices
> [DO NOT MERGE] dt-bindings: power: qcom-rpmpd: drop compatibility defines
> [DO NOT MERGE] dt-bindings: power: qcom,rpmhpd: drop duplicate defines
>
> arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 4 +-
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 +-
> arch/arm64/boot/dts/qcom/msm8917.dtsi | 10 +-
> arch/arm64/boot/dts/qcom/msm8976.dtsi | 4 +-
> arch/arm64/boot/dts/qcom/msm8998.dtsi | 16 +-
> arch/arm64/boot/dts/qcom/sdm630.dtsi | 16 +-
> arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 +-
> drivers/pmdomain/qcom/rpmpd.c | 112 ++++-----
> include/dt-bindings/power/qcom,rpmhpd.h | 175 +++++++++++++++
> include/dt-bindings/power/qcom-rpmpd.h | 375 ++++---------------------------
> 10 files changed, 306 insertions(+), 426 deletions(-)
> ---
> base-commit: d086c886ceb9f59dea6c3a9dae7eb89e780a20c9
> change-id: 20250717-rework-rpmhpd-rpmpd-13352a10cbd5
>
> Best regards,
> --
> With best wishes
> Dmitry
>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices
2025-07-20 3:38 ` [PATCH 0/8] pmdomain: qcom: sort out RPMh and RPM power domain indices Bjorn Andersson
@ 2025-08-19 12:26 ` Ulf Hansson
0 siblings, 0 replies; 17+ messages in thread
From: Ulf Hansson @ 2025-08-19 12:26 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Dmitry Baryshkov, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, linux-pm
On Sun, 20 Jul 2025 at 05:39, Bjorn Andersson <andersson@kernel.org> wrote:
>
> On Fri, Jul 18, 2025 at 07:13:38PM +0300, Dmitry Baryshkov wrote:
> > - Separate RPMh power domain bindings from RPM PD bindings
> >
> > - Drop now-unused (after [1] is merged) binding indices for RPMh
> > platforms
> >
> > - Introduce generic bindings for RPM power domains controller
> >
> > Two last patches (marked as [DO NOT MERGE]) should only be merged after
> > corresponding DT cleanup lands ([1] and DTS parts of this patchset).
> >
>
> Ulf, please feel free to pick the DT changes through your tree so we
> don't need to wait a whole cycle.
I am worried this may cause a merge conflict for us, should we really do this?
>
> Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Anyway, I decided to start by applying patch 1->4 for next.
Patch 1->3 is also available on my immutable dt branch for you to
pull-in. Please let me know how you prefer us to proceed.
Kind regards
Uffe
>
> Regards,
> Bjorn
>
> > [1] https://lore.kernel.org/r/20250717-fix-rpmhpd-abi-v1-0-4c82e25e3280@oss.qualcomm.com
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
> > Dmitry Baryshkov (8):
> > dt-bindings: power: qcom-rpmpd: split RPMh domains definitions
> > dt-bindings: power: qcom-rpmpd: sort out entries
> > dt-bindings: power: qcom-rpmpd: add generic bindings for RPM power domains
> > pmdomain: qcom: rpmpd: switch to RPMPD_* indices
> > arm64: dts: qcom: dts: switch to RPMPD_* indices
> > ARM: dts: qcom: dts: switch to RPMPD_* indices
> > [DO NOT MERGE] dt-bindings: power: qcom-rpmpd: drop compatibility defines
> > [DO NOT MERGE] dt-bindings: power: qcom,rpmhpd: drop duplicate defines
> >
> > arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 4 +-
> > arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 +-
> > arch/arm64/boot/dts/qcom/msm8917.dtsi | 10 +-
> > arch/arm64/boot/dts/qcom/msm8976.dtsi | 4 +-
> > arch/arm64/boot/dts/qcom/msm8998.dtsi | 16 +-
> > arch/arm64/boot/dts/qcom/sdm630.dtsi | 16 +-
> > arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 +-
> > drivers/pmdomain/qcom/rpmpd.c | 112 ++++-----
> > include/dt-bindings/power/qcom,rpmhpd.h | 175 +++++++++++++++
> > include/dt-bindings/power/qcom-rpmpd.h | 375 ++++---------------------------
> > 10 files changed, 306 insertions(+), 426 deletions(-)
> > ---
> > base-commit: d086c886ceb9f59dea6c3a9dae7eb89e780a20c9
> > change-id: 20250717-rework-rpmhpd-rpmpd-13352a10cbd5
> >
> > Best regards,
> > --
> > With best wishes
> > Dmitry
> >
^ permalink raw reply [flat|nested] 17+ messages in thread