From: Randy Jennings <randyj@purestorage.com>
To: Mohamed Khalfella <mkhalfella@purestorage.com>
Cc: Justin Tee <justin.tee@broadcom.com>,
Naresh Gottumukkala <nareshgottumukkala83@gmail.com>,
Paul Ely <paul.ely@broadcom.com>,
Chaitanya Kulkarni <kch@nvidia.com>,
Jens Axboe <axboe@kernel.dk>, Keith Busch <kbusch@kernel.org>,
Sagi Grimberg <sagi@grimberg.me>,
James Smart <jsmart833426@gmail.com>,
Hannes Reinecke <hare@suse.de>,
Aaron Dailey <adailey@purestorage.com>,
Dhaval Giani <dgiani@purestorage.com>,
linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 04/15] nvmet: Implement CCR logpage
Date: Thu, 14 May 2026 17:38:35 -0700 [thread overview]
Message-ID: <CAPpK+O2A-5vez-HhJm_2dDUC1nbdbbWnTWikq4_P9N77pnpM7g@mail.gmail.com> (raw)
In-Reply-To: <20260328004518.1729186-5-mkhalfella@purestorage.com>
On Fri, Mar 27, 2026 at 5:45 PM Mohamed Khalfella
<mkhalfella@purestorage.com> wrote:
>
> Defined by TP8028 Rapid Path Failure Recovery, CCR (Cross-Controller
> Reset) log page contains an entry for each CCR request submitted to
> source controller. Implement CCR logpage for nvme linux target.
> +/* NVMe Cross-Controller Reset Status */
> +enum {
> + NVME_CCR_STATUS_IN_PROGRESS,
> + NVME_CCR_STATUS_SUCCESS,
> + NVME_CCR_STATUS_FAILED,
> +};
> +
Looking at the rest of the code, all the enums are defined except
/* NVMe Namespace Write Protect State */
which does define the value of the first entry (0).
I think it would be prefereable to add explicit values here (0, 1, 2) even
though the implicit values should be correct.
Sincerely,
Randy Jennings
next prev parent reply other threads:[~2026-05-15 0:38 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260328004518.1729186-1-mkhalfella@purestorage.com>
2026-05-12 21:40 ` [PATCH v4 00/15] TP8028 Rapid Path Failure Recovery Mohamed Khalfella
2026-05-12 22:02 ` Sagi Grimberg
[not found] ` <20260328004518.1729186-3-mkhalfella@purestorage.com>
2026-05-14 23:42 ` [PATCH v4 02/15] nvmet/debugfs: Export controller CIU and CIRN via debugfs Randy Jennings
[not found] ` <20260328004518.1729186-4-mkhalfella@purestorage.com>
2026-05-15 0:18 ` [PATCH v4 03/15] nvmet: Implement CCR nvme command Randy Jennings
[not found] ` <20260328004518.1729186-5-mkhalfella@purestorage.com>
2026-05-15 0:38 ` Randy Jennings [this message]
[not found] ` <20260328004518.1729186-6-mkhalfella@purestorage.com>
2026-05-15 0:50 ` [PATCH v4 05/15] nvmet: Send an AEN on CCR completion Randy Jennings
[not found] ` <20260328004518.1729186-7-mkhalfella@purestorage.com>
2026-05-15 2:03 ` [PATCH v4 06/15] nvme: Rapid Path Failure Recovery read controller identify fields Randy Jennings
[not found] ` <20260328004518.1729186-8-mkhalfella@purestorage.com>
2026-05-15 2:06 ` [PATCH v4 07/15] nvme: Introduce FENCING and FENCED controller states Randy Jennings
[not found] ` <20260328004518.1729186-2-mkhalfella@purestorage.com>
2026-05-15 2:08 ` [PATCH v4 01/15] nvmet: Rapid Path Failure Recovery set controller identify fields Randy Jennings
[not found] ` <20260328004518.1729186-9-mkhalfella@purestorage.com>
2026-05-15 2:32 ` [PATCH v4 08/15] nvme: Implement cross-controller reset recovery Randy Jennings
[not found] ` <20260328004518.1729186-10-mkhalfella@purestorage.com>
2026-05-15 2:47 ` [PATCH v4 09/15] nvme: Implement cross-controller reset completion Randy Jennings
[not found] ` <73a9c0e2-ecd0-4170-8723-259529617ec0@suse.de>
[not found] ` <20260331165510.GD2861-mkhalfella@purestorage.com>
[not found] ` <019cf04f-8988-46fd-aecd-0f77ac5f8b8a@suse.de>
[not found] ` <20260407190940.GF2861-mkhalfella@purestorage.com>
2026-05-15 2:49 ` Randy Jennings
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