[PATCH 00/11] Add Mobileye EyeQ system controller support (clk, reset, pinctrl)

Théo Lebrun
2024-04-10T17:12:34Z

Hello,

This builds on previous EyeQ5 system-controller revisions [0] and adds
EyeQ6L + EyeQ6H support. Pinctrl is not affected because it is not
handled in the same manner on those new platforms; it will be dealt
with with pinctrl-single. Only clk and reset expand to support those
new platform.

Changes in drivers are pretty massive, which explains why I started a
new revision count.

EyeQ6H is particular in that it has not one but seven OLB instances.
All seven host a (different) clock controller. Three host a reset
controller.

Patches are targeting MIPS, clk, reset and pinctrl trees independently.

- dt-bindings: soc: mobileye: add EyeQ5 OLB system controller
- MIPS: mobileye: eyeq5: add OLB syscon node
- MIPS: mobileye: eyeq5: use OLB clocks controller node
- MIPS: mobileye: eyeq5: add OLB reset controller node
- MIPS: mobileye: eyeq5: add pinctrl node & pinmux function nodes

Patches have no dependencies on this series. All required devicetrees
and bindings got in the last release. Bindings changes below are
only related to EyeQ6L/EyeQ6H.

- dt-bindings: clock: mobileye,eyeq5-clk: add EyeQ6L and EyeQ6H
- clk: divider: Introduce CLK_DIVIDER_EVEN_INTEGERS flag
- clk: eyeq: add driver

Clocks on all three platforms are rather similar. We have a bunch of
PLLs children to the main crystal, some being required early
(at of_clk_init(), before platform bus init).

We have a few divider clocks in some instances. A custom clk-divider
flag is introduced for the divisor because one clk would have a 256
entries table otherwise.

Compatible match data stores it all, nothing is declared in DT. Match
data has three arrays for the three types of clocks: early PLLs,
standard PLLs and divider clks.

- dt-bindings: reset: mobileye,eyeq5-reset: add EyeQ6L and EyeQ6H
- reset: eyeq: add platform driver

Resets on all three platforms are rather similar. We therefore
declare reset domain types and assign compatibles to an array of
domains, with types and valid masks associated. The rest is pretty
similar to previous code.

EyeQ6H west and east OLB each host an instance of the same compat.

- pinctrl: eyeq5: add platform driver

Not affected by EyeQ6L/EyeQ6H additions. It has not changed.

Have a nice day,
Théo

[0]: https://lore.kernel.org/lkml/20240301-mbly-clk-v9-0-cbf06eb88708@bootlin.com/

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
---
Théo Lebrun (11):
dt-bindings: soc: mobileye: add EyeQ5 OLB system controller
dt-bindings: clock: mobileye,eyeq5-clk: add EyeQ6L and EyeQ6H
dt-bindings: reset: mobileye,eyeq5-reset: add EyeQ6L and EyeQ6H
clk: divider: Introduce CLK_DIVIDER_EVEN_INTEGERS flag
clk: eyeq: add driver
reset: eyeq: add platform driver
pinctrl: eyeq5: add platform driver
MIPS: mobileye: eyeq5: add OLB syscon node
MIPS: mobileye: eyeq5: use OLB clocks controller node
MIPS: mobileye: eyeq5: add OLB reset controller node
MIPS: mobileye: eyeq5: add pinctrl node & pinmux function nodes

.../bindings/clock/mobileye,eyeq5-clk.yaml | 103 +++-
.../bindings/reset/mobileye,eyeq5-reset.yaml | 88 ++-
.../bindings/soc/mobileye/mobileye,eyeq5-olb.yaml | 125 ++++
MAINTAINERS | 8 +
.../{eyeq5-fixed-clocks.dtsi => eyeq5-clocks.dtsi} | 54 +-
arch/mips/boot/dts/mobileye/eyeq5-pins.dtsi | 125 ++++
arch/mips/boot/dts/mobileye/eyeq5.dtsi | 42 +-
drivers/clk/Kconfig | 11 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-divider.c | 12 +-
drivers/clk/clk-eyeq.c | 644 +++++++++++++++++++++
drivers/pinctrl/Kconfig | 14 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-eyeq5.c | 579 ++++++++++++++++++
drivers/reset/Kconfig | 13 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-eyeq.c | 543 +++++++++++++++++
include/dt-bindings/clock/mobileye,eyeq5-clk.h | 21 +
include/linux/clk-provider.h | 11 +-
19 files changed, 2322 insertions(+), 74 deletions(-)
---
base-commit: c8e31f416e99bd460f6f8847709bf69c72a3e146
change-id: 20240408-mbly-olb-75a85f5cfde3

Best regards,
--
Théo Lebrun <theo.lebrun@bootlin.com>