[RFC PATCH 00/11] Introduce Tegra register config settings

Krishna Yarlagadda
2024-05-06T22:52:26Z

This is a request for comments on high level design of Tegra config settings.

NVIDIA Tegra SoCs have various I/O controllers and these controllers require
specific register configurations based on:
- Functional mode (eg. speed)
- Interface properties (eg. signal timings)
- Manufacturing characteristics (eg. process/package)
- Thermal characteristics
- Board characteristics

Some of the configurations can be provided by device specific standard DT
properties like speed of interface in I2C, rising/falling timing etc. However,
there are more device specific configurations required to tune the interface
based on execution mode or other runtime parameters. All such configurations are
defined as 'config' settings of the device. This configures a device to operate
with the optimal settings for a particular mode to improve performance,
stability or reduce power.

Add the mechanism to provide the configuration parameters from the device tree
called "config setting via Device Tree".
This series capture the device tree details, common parser code for Tegra SOC
and the usage in I/O controllers I2C, SPI.

Patch 01: Documentation about the device tree binding for common config framework.
Patch 02: Common parser of the device tree config setting node for Tegra SoC.
Patch 03: Device tree binding documentation for config setting.
Patch 04: Device tree binding documentation for the I2C config setting.
Patch 05: Avoid config settings child node to be treated as I2C device.
Patch 06: Move clock initialization code into new methods
Patch 07: Using config settings in Tegra I2C driver for interface timing registers.
Patch 08: Add Tegra234 I2C config settings in DT.
Patch 09: Device tree binding documentation for the SDHCI config setting.
Patch 10: Using config settings in Tegra SDHCI driver for tuning iteration.
Patch 11: Add Tegra234 SDHCI config settings in DT.

Known Issues:
- DTC warning for config 'missing or empty reg property for I2C nodes'

Krishna Yarlagadda (11):
Documentation: Introduce config settings framework
soc: tegra: Add config setting framework
soc: tegra: config settings binding document
i2c: dt-bindings: configuration settings
i2c: core: Avoid config node enumeration
i2c: tegra: split clock initialization code
i2c: tegra: config settings for interface timings
arm64: tegra: I2C interface timings
sdhci: dt-bindings: configuration settings
mmc: host: tegra: config settings for timing
arm64: tegra: SDHCI timing settings

.../bindings/i2c/nvidia,tegra20-i2c.yaml | 104 ++++
.../misc/nvidia,tegra-config-settings.yaml | 50 ++
.../bindings/mmc/nvidia,tegra20-sdhci.yaml | 36 ++
Documentation/misc-devices/tegra-cfg.rst | 128 +++++
MAINTAINERS | 10 +
arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi | 478 ++++++++++++++++++
.../dts/nvidia/tegra234-p3701-0000-cfg.dtsi | 123 +++++
.../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 1 +
drivers/i2c/busses/i2c-tegra.c | 257 ++++++++--
drivers/i2c/i2c-core-of.c | 3 +
drivers/mmc/host/sdhci-tegra.c | 84 +++
drivers/soc/tegra/Makefile | 1 +
drivers/soc/tegra/tegra-cfg.c | 147 ++++++
include/soc/tegra/tegra-cfg.h | 87 ++++
14 files changed, 1456 insertions(+), 53 deletions(-)
create mode 100644 Documentation/devicetree/bindings/misc/nvidia,tegra-config-settings.yaml
create mode 100644 Documentation/misc-devices/tegra-cfg.rst
create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-cfg.dtsi
create mode 100644 arch/arm64/boot/dts/nvidia/tegra234-p3701-0000-cfg.dtsi
create mode 100644 drivers/soc/tegra/tegra-cfg.c
create mode 100644 include/soc/tegra/tegra-cfg.h

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