Re: [PATCH 2/6] clk: rockchip: fix wrong clk_ref_usb3otg parent for rk3328

Dragan Simic
2024-12-10T09:44:43Z

Hello Peter,

On 2024-12-10 02:30, Peter Geis wrote:
> Correct the clk_ref_usb3otg parent to fix clock control for the usb3
> controller on rk3328. Verified against the rk3328 trm and usb3 clock
> tree
> documentation.
>
> Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328")
> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> ---
>
> drivers/clk/rockchip/clk-rk3328.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/rockchip/clk-rk3328.c
> b/drivers/clk/rockchip/clk-rk3328.c
> index 3bb87b27b662..cf60fcf2fa5c 100644
> --- a/drivers/clk/rockchip/clk-rk3328.c
> +++ b/drivers/clk/rockchip/clk-rk3328.c
> @@ -201,7 +201,7 @@ PNAME(mux_aclk_peri_pre_p) = { "cpll_peri",
> "gpll_peri",
> "hdmiphy_peri" };
> PNAME(mux_ref_usb3otg_src_p) = { "xin24m",
> - "clk_usb3otg_ref" };
> + "clk_ref_usb3otg_src" };
> PNAME(mux_xin24m_32k_p) = { "xin24m",
> "clk_rtc32k" };
> PNAME(mux_mac2io_src_p) = { "clk_mac2io_src",

Sorry, but I was unable to verify this in the part 1 of the
RK3328 TRM, in both versions 1.1 and 1.2, which is all I have
when it comes to the RK3328 TRM. Is that maybe described in
the part 2, which I've been unable to locate for years?

Moreover, the downstream kernel source from Rockchip does it
the way [1] it's currently done in the mainline kernel, which
makes me confused a bit? Could you, please, provide more
details about the two references you mentioned in the patch
description, or maybe even you could provide the links to
those two references?

[1]