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* [PATCH v3] media: verisilicon: HEVC: Initialize start_bit field
@ 2025-01-20 15:35 Benjamin Gaignard
  2025-01-20 19:39 ` Diederik de Haas
  2025-01-20 19:43 ` Diederik de Haas
  0 siblings, 2 replies; 3+ messages in thread
From: Benjamin Gaignard @ 2025-01-20 15:35 UTC (permalink / raw)
  To: nicolas.dufresne, p.zabel, mchehab
  Cc: linux-media, linux-rockchip, linux-kernel, Benjamin Gaignard

Always set start_bit field to 0, if not it could lead to corrupted frames
specially when decoding VP9 bitstreams at the same time since VP9 driver
set it for its own purpose.

Fixes: cb5dd5a0fa51 ("media: hantro: Introduce G2/HEVC decoder")
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Tested-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
---
 drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
index 85a44143b378..0e212198dd65 100644
--- a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
+++ b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
@@ -518,6 +518,7 @@ static void set_buffers(struct hantro_ctx *ctx)
 	hantro_reg_write(vpu, &g2_stream_len, src_len);
 	hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len);
 	hantro_reg_write(vpu, &g2_strm_start_offset, 0);
+	hantro_reg_write(vpu, &g2_start_bit, 0);
 	hantro_reg_write(vpu, &g2_write_mvs_e, 1);
 
 	hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma);
-- 
2.43.0


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2025-01-20 15:35 [PATCH v3] media: verisilicon: HEVC: Initialize start_bit field Benjamin Gaignard
2025-01-20 19:39 ` Diederik de Haas
2025-01-20 19:43 ` Diederik de Haas

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