[PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Marek Vasut]

Add IDs for Winbond W77Q51NW, 512M-bit Secure Serial Flash Memory
with Post-Quantum Cryptography, Dual/Quad SPI, QPI and DTR . The
flash part is similar to W25Q512NWM .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Michael Walle <mwalle@kernel.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Pratyush Yadav <pratyush@kernel.org>
Cc: Richard Weinberger <richard@nod.at>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
---
V2: - Un-name the SPI NOR
    - Include output of https://docs.kernel.org/driver-api/mtd/spi-nor.html#minimum-testing-requirements
---
This flash is populated on the Retronix R-Car V4H Sparrow Hawk EVTB1 board
and was tested at 40 MHz frequency using the renesas,r8a779g0-rpc-if SPI
controller.

$ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
ef8a1a

$ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
winbond

$ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
534644500a0103ff00070117800000ff84010102e00000ffef04010a8001
000103000102c00100ffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffe520aaffffffff1f46eb000000000000feffffffffff
0000ffff46eb0c200f5210d800004642b10082e412d8ed6376337a757a75
0fa4d55c190a78ff807439250000000000002c2e00000000f6f4ffff0d00
0000460d000046ed46edffffffff632f000021ffdcffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffff030009088091
09ffa0a1a2ffffffffffd0d1d2ffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffff7c9b
96f0a1a4c2ff

$ sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
98f6f35460da6c6c617a6da2cbaf93cee5310a30d5d2f91af4613e04941fe863  /sys/bus/spi/devices/spi0.0/spi-nor/sfdp

$ cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
 1S-1S-1S
  opcode        0x13
  mode cycles   0
  dummy cycles  0
 1S-4S-4S
  opcode        0xec
  mode cycles   2
  dummy cycles  6
 4S-4S-4S
  opcode        0xec
  mode cycles   2
  dummy cycles  6

Supported page program modes by the flash
 1S-1S-1S
  opcode        0x12
 1S-4S-4S
  opcode        0x3e

$ cat /sys/kernel/debug/spi-nor/spi0.0/params
name            (null)
id              ef 8a 1a 00 00 00
size            64.0 MiB
write size      1
page size       256
address nbytes  4
flags           4B_OPCODES | HAS_4BAIT | HAS_16BIT_SR | SOFT_RESET

opcodes
 read           0xec
  dummy cycles  8
 erase          0x21
 program        0x3e
 8D extension   invert

protocols
 read           1S-4S-4S
 write          1S-4S-4S
 register       1S-1S-1S

erase commands
 21 (4.00 KiB) [1]
 ff (32.0 KiB) [2]
 dc (64.0 KiB) [3]
 c7 (64.0 MiB)

sector map
 region (in hex)   | erase mask | overlaid
 ------------------+------------+----------
 00000000-03ffffff |     [ 1  ] | no

$ cat /proc/mtd
dev:    size   erasesize  name
mtd0: 01000000 00001000 "boot"
mtd1: 02f80000 00001000 "user"
mtd2: 00040000 00001000 "env1"
mtd3: 00040000 00001000 "env2"

$ dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.1 MB, 2.0 MiB) copied, 0.0129542 s, 162 MB/s

$ mtd_debug erase /dev/mtd1 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash

$ mtd_debug read /dev/mtd1 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read

$ hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000

$ sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  spi_read

$ mtd_debug write /dev/mtd1 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash

$ mtd_debug read /dev/mtd1 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read

$ sha256sum spi*
6f59068c602a91d09e181a44109978239ca40dc539990cf695f5b65fa8cd03f6  spi_read
6f59068c602a91d09e181a44109978239ca40dc539990cf695f5b65fa8cd03f6  spi_test

$ mtd_debug erase /dev/mtd1 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash

$ mtd_debug read /dev/mtd1 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read

$ sha256sum spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  spi_read
6f59068c602a91d09e181a44109978239ca40dc539990cf695f5b65fa8cd03f6  spi_test

$ mtd_debug info /dev/mtd1
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 49807360 (47M)
mtd.erasesize = 4096 (4K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
---
 drivers/mtd/spi-nor/winbond.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index 63a93c9eb917..3881a1c8a4a2 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -343,6 +343,10 @@ static const struct flash_info winbond_nor_parts[] = {
 		.id = SNOR_ID(0xef, 0x80, 0x20),
 		.name = "w25q512nwm",
 		.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+	}, {
+		/* W77Q51NW */
+		.id = SNOR_ID(0xef, 0x8a, 0x1a),
+		.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
 	},
 };
 
-- 
2.47.2

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Tudor Ambarus]

On 7/21/25 9:22 PM, Marek Vasut wrote:
> Add IDs for Winbond W77Q51NW, 512M-bit Secure Serial Flash Memory
> with Post-Quantum Cryptography, Dual/Quad SPI, QPI and DTR . The
> flash part is similar to W25Q512NWM .
> 
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Michael Walle]

Hi Marek,

> --- a/drivers/mtd/spi-nor/winbond.c
> +++ b/drivers/mtd/spi-nor/winbond.c
> @@ -343,6 +343,10 @@ static const struct flash_info winbond_nor_parts[] 
> = {
>  		.id = SNOR_ID(0xef, 0x80, 0x20),
>  		.name = "w25q512nwm",
>  		.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
> +	}, {
> +		/* W77Q51NW */
> +		.id = SNOR_ID(0xef, 0x8a, 0x1a),
> +		.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),

Did you also test the OTP read and write? I'd guess so, because 
otherwise
you wouldn't need that entry at all, right? Or is it because of the
winbond_nor_late_init() which will be called as a manufacturer fixup?
In that case we could do the same as in commit afe1ea1344bb ("mtd: 
spi-nor:
add support for Macronix Octal flash").

-michael

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Tudor Ambarus]

On 7/22/25 9:43 AM, Michael Walle wrote:
> Hi Marek,
> 
>> --- a/drivers/mtd/spi-nor/winbond.c
>> +++ b/drivers/mtd/spi-nor/winbond.c
>> @@ -343,6 +343,10 @@ static const struct flash_info winbond_nor_parts[] = {
>>          .id = SNOR_ID(0xef, 0x80, 0x20),
>>          .name = "w25q512nwm",
>>          .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
>> +    }, {
>> +        /* W77Q51NW */
>> +        .id = SNOR_ID(0xef, 0x8a, 0x1a),
>> +        .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
> 
> Did you also test the OTP read and write? I'd guess so, because otherwise

Any of you interested in adding testing requirements and examples for otp?

> you wouldn't need that entry at all, right? Or is it because of the
> winbond_nor_late_init() which will be called as a manufacturer fixup?

M,

the overwrite of set_4byte_addr_mode in winbond_nor_late_init() seems a
little trashy, we assume that winbond will always use
spi_nor_set_4byte_addr_mode_en4b_ex4b(), apart of the extra ops that we're
doing there. Aren't we better without this generalization?

> In that case we could do the same as in commit afe1ea1344bb ("mtd: spi-nor:
> add support for Macronix Octal flash").
> 
> -michael

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Michael Walle]

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On Tue Jul 22, 2025 at 11:37 AM CEST, Tudor Ambarus wrote:
>
>
> On 7/22/25 9:43 AM, Michael Walle wrote:
> > Hi Marek,
> > 
> >> --- a/drivers/mtd/spi-nor/winbond.c
> >> +++ b/drivers/mtd/spi-nor/winbond.c
> >> @@ -343,6 +343,10 @@ static const struct flash_info winbond_nor_parts[] = {
> >>          .id = SNOR_ID(0xef, 0x80, 0x20),
> >>          .name = "w25q512nwm",
> >>          .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
> >> +    }, {
> >> +        /* W77Q51NW */
> >> +        .id = SNOR_ID(0xef, 0x8a, 0x1a),
> >> +        .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
> > 
> > Did you also test the OTP read and write? I'd guess so, because otherwise
>
> Any of you interested in adding testing requirements and examples for otp?

Let's add this to my pile of "things to do when I'm having time
again" :)

>
> > you wouldn't need that entry at all, right? Or is it because of the
> > winbond_nor_late_init() which will be called as a manufacturer fixup?
>
> M,
>
> the overwrite of set_4byte_addr_mode in winbond_nor_late_init() seems a
> little trashy, we assume that winbond will always use
> spi_nor_set_4byte_addr_mode_en4b_ex4b(), apart of the extra ops that we're
> doing there. Aren't we better without this generalization?

Not sure where that comes from originally. But we are overwriting
what SFDP is figuring out, correct? Maybe we should do the same as
in macronix.c; just set it when it is not set. If the SFDP doesn't
specify the method, I'd say it is a fair assumption that any (older)
winbond flash use that stateful method to enter 4 byte addressing
mode. Newer flashes probably features SFDP.

For the extra ops.. I'm not sure if that is/was just a quirk for
that particular flash or if any winbond flash has that problem.

-michael

>
> > In that case we could do the same as in commit afe1ea1344bb ("mtd: spi-nor:
> > add support for Macronix Octal flash").
> > 
> > -michael


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Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Marek Vasut]

On 7/22/25 10:43 AM, Michael Walle wrote:
> Hi Marek,

Hi,

>> --- a/drivers/mtd/spi-nor/winbond.c
>> +++ b/drivers/mtd/spi-nor/winbond.c
>> @@ -343,6 +343,10 @@ static const struct flash_info 
>> winbond_nor_parts[] = {
>>          .id = SNOR_ID(0xef, 0x80, 0x20),
>>          .name = "w25q512nwm",
>>          .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
>> +    }, {
>> +        /* W77Q51NW */
>> +        .id = SNOR_ID(0xef, 0x8a, 0x1a),
>> +        .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
> 
> Did you also test the OTP read and write? I'd guess so, because otherwise
> you wouldn't need that entry at all, right? Or is it because of the
> winbond_nor_late_init() which will be called as a manufacturer fixup?
> In that case we could do the same as in commit afe1ea1344bb ("mtd: spi-nor:
> add support for Macronix Octal flash").

I have limited supply of these devices, so OTP is untested. The flash 
does have OTP registers, that's why the .otp entry is there. Why should 
I remove it if the OTP registers are in the chip ?

-- 
Best regards,
Marek Vasut

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Michael Walle]

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On Tue Jul 22, 2025 at 4:28 PM CEST, Marek Vasut wrote:
> On 7/22/25 10:43 AM, Michael Walle wrote:
> > Hi Marek,
>
> Hi,
>
> >> --- a/drivers/mtd/spi-nor/winbond.c
> >> +++ b/drivers/mtd/spi-nor/winbond.c
> >> @@ -343,6 +343,10 @@ static const struct flash_info 
> >> winbond_nor_parts[] = {
> >>          .id = SNOR_ID(0xef, 0x80, 0x20),
> >>          .name = "w25q512nwm",
> >>          .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
> >> +    }, {
> >> +        /* W77Q51NW */
> >> +        .id = SNOR_ID(0xef, 0x8a, 0x1a),
> >> +        .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
> > 
> > Did you also test the OTP read and write? I'd guess so, because otherwise
> > you wouldn't need that entry at all, right? Or is it because of the
> > winbond_nor_late_init() which will be called as a manufacturer fixup?
> > In that case we could do the same as in commit afe1ea1344bb ("mtd: spi-nor:
> > add support for Macronix Octal flash").
>
> I have limited supply of these devices, so OTP is untested. The flash 
> does have OTP registers, that's why the .otp entry is there. Why should 
> I remove it if the OTP registers are in the chip ?

We only add tested features. I'm just the messenger here :o. Anyway,
OTP is not really one-time-programmable here, you can write and
erase it again as long as you don't lock it, if that was your
concern.

But my main question was whether this chip is working without
this entry (if you don't use the OTP bits) or if there is still
something missing. IOW, with this patch you are just adding the
OTP feature.

-michael

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Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Marek Vasut]

On 7/23/25 8:36 AM, Michael Walle wrote:
> On Tue Jul 22, 2025 at 4:28 PM CEST, Marek Vasut wrote:
>> On 7/22/25 10:43 AM, Michael Walle wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>>> --- a/drivers/mtd/spi-nor/winbond.c
>>>> +++ b/drivers/mtd/spi-nor/winbond.c
>>>> @@ -343,6 +343,10 @@ static const struct flash_info
>>>> winbond_nor_parts[] = {
>>>>           .id = SNOR_ID(0xef, 0x80, 0x20),
>>>>           .name = "w25q512nwm",
>>>>           .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
>>>> +    }, {
>>>> +        /* W77Q51NW */
>>>> +        .id = SNOR_ID(0xef, 0x8a, 0x1a),
>>>> +        .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
>>>
>>> Did you also test the OTP read and write? I'd guess so, because otherwise
>>> you wouldn't need that entry at all, right? Or is it because of the
>>> winbond_nor_late_init() which will be called as a manufacturer fixup?
>>> In that case we could do the same as in commit afe1ea1344bb ("mtd: spi-nor:
>>> add support for Macronix Octal flash").
>>
>> I have limited supply of these devices, so OTP is untested. The flash
>> does have OTP registers, that's why the .otp entry is there. Why should
>> I remove it if the OTP registers are in the chip ?
> 
> We only add tested features. I'm just the messenger here :o. Anyway,
> OTP is not really one-time-programmable here, you can write and
> erase it again as long as you don't lock it, if that was your
> concern.

So how do I test the OTP without locking it ?

-- 
Best regards,
Marek Vasut

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Michael Walle]

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> >> I have limited supply of these devices, so OTP is untested. The flash
> >> does have OTP registers, that's why the .otp entry is there. Why should
> >> I remove it if the OTP registers are in the chip ?
> > 
> > We only add tested features. I'm just the messenger here :o. Anyway,
> > OTP is not really one-time-programmable here, you can write and
> > erase it again as long as you don't lock it, if that was your
> > concern.
>
> So how do I test the OTP without locking it ?

flash_otp_{write,info,dump,erase}, just don't use flash_otp_lock.

-michael

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Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Marek Vasut]

On 7/28/25 8:32 AM, Michael Walle wrote:
>>>> I have limited supply of these devices, so OTP is untested. The flash
>>>> does have OTP registers, that's why the .otp entry is there. Why should
>>>> I remove it if the OTP registers are in the chip ?
>>>
>>> We only add tested features. I'm just the messenger here :o. Anyway,
>>> OTP is not really one-time-programmable here, you can write and
>>> erase it again as long as you don't lock it, if that was your
>>> concern.
>>
>> So how do I test the OTP without locking it ?
> 
> flash_otp_{write,info,dump,erase}, just don't use flash_otp_lock.

Thanks. flash_otp_dump -u /dev/mtd0 returns zeroes, so I suspect the OTP 
is not working. The chip does work even without this entry and the 
content /sys/kernel/debug/spi-nor/spi0.0/capabilities and 
/sys/kernel/debug/spi-nor/spi0.0/params did not change, so I think the 
best way forward is to drop this patch, until I can figure out the OTP 
on this chip ?

-- 
Best regards,
Marek Vasut

Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW

[Michael Walle]

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On Tue Jul 29, 2025 at 5:51 AM CEST, Marek Vasut wrote:
> On 7/28/25 8:32 AM, Michael Walle wrote:
> >>>> I have limited supply of these devices, so OTP is untested. The flash
> >>>> does have OTP registers, that's why the .otp entry is there. Why should
> >>>> I remove it if the OTP registers are in the chip ?
> >>>
> >>> We only add tested features. I'm just the messenger here :o. Anyway,
> >>> OTP is not really one-time-programmable here, you can write and
> >>> erase it again as long as you don't lock it, if that was your
> >>> concern.
> >>
> >> So how do I test the OTP without locking it ?
> > 
> > flash_otp_{write,info,dump,erase}, just don't use flash_otp_lock.
>
> Thanks. flash_otp_dump -u /dev/mtd0 returns zeroes, so I suspect the OTP 
> is not working. The chip does work even without this entry and the 
> content /sys/kernel/debug/spi-nor/spi0.0/capabilities and 
> /sys/kernel/debug/spi-nor/spi0.0/params did not change, so I think the 
> best way forward is to drop this patch, until I can figure out the OTP 
> on this chip ?

Probably. Good to know that the flash is working for you.

-michael

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