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From: "Diederik de Haas" To: "Christian Hewitt" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Heiko Stuebner" Cc: "Alex Bee" , , , , Subject: Re: [PATCH v3 1/2] arm64: dts: rockchip: add GPU powerdomain, opps, and cooling to rk3328 References: <20250906120810.1833016-1-christianshewitt@gmail.com> In-Reply-To: <20250906120810.1833016-1-christianshewitt@gmail.com> X-Migadu-Flow: FLOW_OUT --ae5433376ac9f3e1826a9aad5813272fffe73f438ca790723a238b2ba171 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 On Sat Sep 6, 2025 at 2:08 PM CEST, Christian Hewitt wrote: > From: Alex Bee > > Add GPU powerdomain, opp-table, and cooling map nodes for the Mali > GPU on the RK3328 SoC. Opp-table frequencies are sourced from the > Rockchip Linux v4.4 vendor kernel while voltages have been derived > from practical use and support work: keeping voltage above 1075mV > and disabling the 500MHz opp-point avoids instability and crashes. > > Signed-off-by: Alex Bee > Signed-off-by: Christian Hewitt Now that the 'other' issue with power domains has been resolved, or at least localized, I feel (more) comfortable giving my Tested-by: Diederik de Haas # Rock64 Cheers, Diederik > --- > Changes since v2: > - Revert to gpu_opp_table but retain opp-table-gpu $nodename > Changes since v1: > - Use opp_table_gpu not gpu_opp_table to fix dtb schema warnings > > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 39 +++++++++++++++++++++++- > 1 file changed, 38 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/d= ts/rockchip/rk3328.dtsi > index 6438c969f9d7..610c1c27b798 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -331,6 +331,11 @@ power: power-controller { > #address-cells =3D <1>; > #size-cells =3D <0>; > =20 > + power-domain@RK3328_PD_GPU { > + reg =3D ; > + clocks =3D <&cru ACLK_GPU>; > + #power-domain-cells =3D <0>; > + }; > power-domain@RK3328_PD_HEVC { > reg =3D ; > clocks =3D <&cru SCLK_VENC_CORE>; > @@ -570,9 +575,13 @@ map0 { > <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > contribution =3D <4096>; > }; > + map1 { > + trip =3D <&target>; > + cooling-device =3D <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + contribution =3D <4096>; > + }; > }; > }; > - > }; > =20 > tsadc: tsadc@ff250000 { > @@ -651,7 +660,35 @@ gpu: gpu@ff300000 { > "ppmmu1"; > clocks =3D <&cru ACLK_GPU>, <&cru ACLK_GPU>; > clock-names =3D "bus", "core"; > + operating-points-v2 =3D <&gpu_opp_table>; > + power-domains =3D <&power RK3328_PD_GPU>; > resets =3D <&cru SRST_GPU_A>; > + #cooling-cells =3D <2>; > + }; > + > + gpu_opp_table: opp-table-gpu { > + compatible =3D "operating-points-v2"; > + opp-200000000 { > + opp-hz =3D /bits/ 64 <200000000>; > + opp-microvolt =3D <1075000>; > + }; > + > + opp-300000000 { > + opp-hz =3D /bits/ 64 <300000000>; > + opp-microvolt =3D <1075000>; > + }; > + > + opp-400000000 { > + opp-hz =3D /bits/ 64 <400000000>; > + opp-microvolt =3D <1075000>; > + }; > + > + opp-500000000 { > + /* causes stability issues */ > + opp-hz =3D /bits/ 64 <500000000>; > + opp-microvolt =3D <1150000>; > + status =3D "disabled"; > + }; > }; > =20 > h265e_mmu: iommu@ff330200 { --ae5433376ac9f3e1826a9aad5813272fffe73f438ca790723a238b2ba171 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQT1sUPBYsyGmi4usy/XblvOeH7bbgUCaMKPyQAKCRDXblvOeH7b bnvvAP9cDJ5evO0m4pNc3VzMtFadq913C7DWR5qrTp1cVAzeMAD/ZA+eArhOyXVx S3TR4Ha5ypA3l+htGbzr3UZ2YtgszQA= =K9LX -----END PGP SIGNATURE----- --ae5433376ac9f3e1826a9aad5813272fffe73f438ca790723a238b2ba171--