Re: [PATCH v4 1/6] nova-core: bitfield: Move bitfield-specific code from register! into new macro

Behme Dirk (XC-CP/ESD1)
2025-09-23T06:38:20Z

> On Sun Sep 21, 2025 at 2:45 PM CEST, Greg KH wrote:
>> Again, regmap handles this all just fine, why not just make bindings to
>> that api here instead?
>
> The idea is to use this for the register!() macro, e.g.
>
> register!(NV_PMC_BOOT_0 @ 0x00000000, "Basic revision information about the GPU" {
> 28:24 architecture_0 as u8, "Lower bits of the architecture";
> 23:20 implementation as u8, "Implementation version of the architecture";
> 8:8 architecture_1 as u8, "MSB of the architecture";
> 7:4 major_revision as u8, "Major revision of the chip";
> 3:0 minor_revision as u8, "Minor revision of the chip";
> });
>
> (More examples in [1].)
>
> This generates a structure with the relevant accessors; we can also implement
> additional logic, such as:
>
> impl NV_PMC_BOOT_0 {
> /// Combines `architecture_0` and `architecture_1` to obtain the architecture of the chip.
> pub(crate) fn architecture(self) -> Result<Architecture> {
> Architecture::try_from(
> self.architecture_0() | (self.architecture_1() << Self::ARCHITECTURE_0_RANGE.len()),
> )
> }
>
> /// Combines `architecture` and `implementation` to obtain a code unique to the chipset.
> pub(crate) fn chipset(self) -> Result<Chipset> {
> self.architecture()
> .map(|arch| {
> ((arch as u32) << Self::IMPLEMENTATION_RANGE.len())
> | u32::from(self.implementation())
> })
> .and_then(Chipset::try_from)
> }
> }
>
> This conviniently allows us to read the register with
>
> let boot0 = regs::NV_PMC_BOOT_0::read(bar);
>
> and obtain an instance of the entire Chipset structure with
>
> let chipset = boot0.chipset()?;
>
> or pass it to a constructor that creates a Revision instance
>
> let rev = Revision::from_boot0(boot0);
>
> Analogously it allows us to modify and write registers without having to mess
> with error prone shifts, masks and casts, because that code is generated by the
> register!() macro. (Of course, unless we have more complicated cases where
> multiple fields have to be combined as illustrated above.)
>
> Note that bar is of type pci::Bar<BAR0_SIZE> where BAR0_SIZE in our case is
> SZ_16M.
>
> However, the type required by read() as generated by the register!() macro
> actually only requires something that implements an I/O backend, i.e
> kernel::io::Io<SIZE>.
>
> pci::Bar is a specific implementation of kernel::io::Io.
>
> With this we can let the actual I/O backend handle the endianness of the bus.
>
> (Actually, we could even implement an I/O backend that uses regmap.)
>
> So, I think the register!() stuff is rather orthogonal.
>
> - Danilo
>
> [1] https://gitlab.freedesktop.org/drm/rust/kernel/-/blob/drm-rust-next/drivers/gpu/nova-core/regs.rs

I really like this discussion with the thoughts and examples given above!

Some weeks ago I was wondering what might be the correct way for
accessing registers in RfL. There are various different examples
floating around what makes the selection of the correct one even harder.
Most probably I have selected the wrong one ;)

So once this discussion comes to a conclusion (and gets merged?) we
might want to have a verbose documentation with background, examples,
possible options etc. Something like "Howto access registers (hardware?)
in RfL (correctly)". I think this would be quite helpful.

Thanks!

Dirk