From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66A51183CA6; Wed, 8 Oct 2025 10:30:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759919432; cv=none; b=or2ZolMw+0TRxoJ2ol4jDdNIEnh2zWIWAhNVoyVaGs5MKoKyk1zZf6Ypbx5oCn+IilOf3GYDRCxie64xwFS8Wv8KJMXliA0BmFRS68pYb7wMoBTJERcQNk7fW4491MnvApURRFnvhDTr0Pm4J0F+KP8EimQCacUiiVZXWj+Kn2w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759919432; c=relaxed/simple; bh=AXcMqvG7cWe67YMt9/vHX2AYm8W1c2Xwkevu9/LVcgA=; h=Mime-Version:Content-Type:Date:Message-Id:Subject:Cc:To:From: References:In-Reply-To; b=D+/0UwSN5K4Au3LlK2Tg9CZR9HkVNOu+X3rpGR4ANUYyqjWeCcVdbBGV6nucnZ5Vdya94J3d1kDramimVTdbkMYpYuFTJ426T7r+41hZnZE17CF8xlY+AsMLll8VA45inUyU/3n5kgt5mxSX5839YHz8MOCOL9fwPQbnU4qyFhw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iqqNoT/a; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iqqNoT/a" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A1CD1C4CEF4; Wed, 8 Oct 2025 10:30:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1759919432; bh=AXcMqvG7cWe67YMt9/vHX2AYm8W1c2Xwkevu9/LVcgA=; h=Date:Subject:Cc:To:From:References:In-Reply-To:From; b=iqqNoT/aMi/YEka2R9fqbhXzM6g7OQ3F8JZv1/EXkGXevjj/VkdLMnjYD8rnf59gn cTTPtm9/zxzcMRCP4HZk7f7lJeLzBXK8s4F2/Iif/dIusIkQP/2IuvttpkdhVGym0J pti/VdjbRO9en5lKB2V9n/4I3Ay5MkN0W/+7LGUJdQCHqU+uTWCcngcGkko7gxf6ih CMqjKg8iOzBDIxin/1aEHaGV7uuXfO6tTDN+Qr4OS80WOjJsHpqjtBRM759svJ3Vss Qz5etPE9MLXJLKor7BByDjHbJM4z2mtoFrfLnRonF9NGv5WdqEmFtDNfcigUIbbjSb USRw9mZj8hUNw== Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 08 Oct 2025 12:30:25 +0200 Message-Id: Subject: Re: [PATCH v4 01/13] gpu: nova-core: Set correct DMA mask Cc: , , , "Miguel Ojeda" , "Alex Gaynor" , "Boqun Feng" , "Gary Guo" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Benno Lossin" , "Andreas Hindborg" , "Alice Ryhl" , "Trevor Gross" , "David Airlie" , "Simona Vetter" , "Maarten Lankhorst" , "Maxime Ripard" , "Thomas Zimmermann" , "John Hubbard" , "Joel Fernandes" , "Timur Tabi" , , To: "Alistair Popple" From: "Danilo Krummrich" References: <20251008001253.437911-1-apopple@nvidia.com> <20251008001253.437911-2-apopple@nvidia.com> In-Reply-To: <20251008001253.437911-2-apopple@nvidia.com> On Wed Oct 8, 2025 at 2:12 AM CEST, Alistair Popple wrote: > Set the correct DMA mask. Without this DMA will fail on some setups. > > Signed-off-by: Alistair Popple > > --- > > Changes for v4: > - Use a const (GPU_DMA_BITS) instead of a magic number > > Changes for v2: > - Update DMA mask to correct value for Ampere/Turing (47 bits) > --- > drivers/gpu/nova-core/driver.rs | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driv= er.rs > index edc72052e27a..84fe4a45eb6a 100644 > --- a/drivers/gpu/nova-core/driver.rs > +++ b/drivers/gpu/nova-core/driver.rs > @@ -3,6 +3,8 @@ > use kernel::{ > auxiliary, c_str, > device::Core, > + dma::Device, > + dma::DmaMask, > pci, > pci::{Class, ClassMask, Vendor}, > prelude::*, > @@ -20,6 +22,10 @@ pub(crate) struct NovaCore { > } > =20 > const BAR0_SIZE: usize =3D SZ_16M; > + > +// For now we only support Ampere which can use up to 47-bit DMA address= es. > +const GPU_DMA_BITS: u32 =3D 47; IIRC, the idea was to abstract this properly with a subsequent patch worked= on by John. In that case, please add a TODO. > pub(crate) type Bar0 =3D pci::Bar; > =20 > kernel::pci_device_table!( > @@ -57,6 +63,9 @@ fn probe(pdev: &pci::Device, _info: &Self::IdInfo= ) -> Result pdev.enable_device_mem()?; > pdev.set_master(); > =20 > + // SAFETY: No DMA allocations have been made yet I think you forgot to address my comment from v2: It's not really about DMA allocations that have been made previously, ther= e is no unsafe behavior in that. =09 It's about the method must not be called concurrently with any DMA allocat= ion or mapping primitives. =09 Can you please adjust the comment correspondingly? In general, I recommend having a look at the safety requirements of the corresponding function. NIT: Please end with a period. > + unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::())? }; > + > let devres_bar =3D Arc::pin_init( > pdev.iomap_region_sized::(0, c_str!("nova-core/ba= r0")), > GFP_KERNEL, > --=20 > 2.50.1