From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Drew Fustini" <fustini@kernel.org>
Cc: "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Conor Dooley" <conor@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Adrien Ricciardi" <aricciardi@baylibre.com>,
"James Morse" <james.morse@arm.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Atish Patra" <atish.patra@linux.dev>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
guo.wenjia23@zte.com.cn, liu.qingtao2@zte.com.cn,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
linux-riscv <linux-riscv-bounces@lists.infradead.org>
Subject: Re: [PATCH v4 3/3] RISC-V: Add support for srmcfg CSR from Ssqosid ext
Date: Mon, 13 Oct 2025 11:06:50 +0200 [thread overview]
Message-ID: <DDH2Q0N2HLKF.2QSW4DB5FTJI6@ventanamicro.com> (raw)
In-Reply-To: <aOqjggmTr4ioHwB/@x1>
2025-10-11T11:35:46-07:00, Drew Fustini <fustini@kernel.org>:
> On Thu, Oct 09, 2025 at 08:47:27AM +0200, Radim Krčmář wrote:
>> 2025-10-07T23:21:12-07:00, Drew Fustini <fustini@kernel.org>:
>> > diff --git a/arch/riscv/include/asm/qos.h b/arch/riscv/include/asm/qos.h
>> > +static inline void __switch_to_srmcfg(struct task_struct *next)
>> > +{
>> > + u32 *cpu_srmcfg_ptr = this_cpu_ptr(&cpu_srmcfg);
>> > + u32 thread_srmcfg;
>> > +
>> > + thread_srmcfg = READ_ONCE(next->thread.srmcfg);
>> > +
>> > + if (thread_srmcfg != *cpu_srmcfg_ptr) {
>>
>> Wouldn't prev->thread.srmcfg have the value of CSR_SRMCFG when executing
>> switch_to?
>
> Thanks for reviewing. Yes, you are right that prev->thread.srmcfg should
> have same value as CSR_SRMCFG. Are you suggesting that the cpu_srmcfg is
> not necessary as prev->thread.srmcfg should have same value?
Yes, it would be more consistent with other context switched state.
I just wasn't sure if srmcfg doesn't have special race conditions.
Thanks.
next prev parent reply other threads:[~2025-10-13 9:08 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-08 6:21 [PATCH v4 0/3] RISC-V: Detect Ssqosid extension and handle srmcfg CSR Drew Fustini
2025-10-08 6:21 ` [PATCH v4 1/3] dt-bindings: riscv: Add Ssqosid extension description Drew Fustini
2025-10-08 6:21 ` [PATCH v4 2/3] RISC-V: Detect the Ssqosid extension Drew Fustini
2025-10-08 6:21 ` [PATCH v4 3/3] RISC-V: Add support for srmcfg CSR from Ssqosid ext Drew Fustini
2025-10-09 6:47 ` Radim Krčmář
2025-10-11 18:35 ` Drew Fustini
2025-10-13 9:06 ` Radim Krčmář [this message]
2025-11-07 17:44 ` Drew Fustini
2025-10-10 12:23 ` [External] [PATCH v4 0/3] RISC-V: Detect Ssqosid extension and handle srmcfg CSR yunhui cui
2025-10-10 21:56 ` Drew Fustini
2025-12-24 8:40 ` yunhui cui
2025-12-24 22:48 ` Drew Fustini
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