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Mon, 13 Oct 2025 02:08:09 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 13 Oct 2025 11:06:50 +0200 Message-Id: Subject: Re: [PATCH v4 3/3] RISC-V: Add support for srmcfg CSR from Ssqosid ext Cc: "Paul Walmsley" , "Palmer Dabbelt" , "Albert Ou" , "Alexandre Ghiti" , "Conor Dooley" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , =?utf-8?q?Kornel_Dul=C4=99ba?= , "Adrien Ricciardi" , "James Morse" , "Atish Kumar Patra" , "Atish Patra" , "Vasudevan Srinivasan" , "Conor Dooley" , , , , , , "linux-riscv" To: "Drew Fustini" From: =?utf-8?q?Radim_Kr=C4=8Dm=C3=A1=C5=99?= References: <20251007-ssqosid-v4-0-e8b57e59d812@kernel.org> <20251007-ssqosid-v4-3-e8b57e59d812@kernel.org> In-Reply-To: 2025-10-11T11:35:46-07:00, Drew Fustini : > On Thu, Oct 09, 2025 at 08:47:27AM +0200, Radim Kr=C4=8Dm=C3=A1=C5=99 wro= te: >> 2025-10-07T23:21:12-07:00, Drew Fustini : >> > diff --git a/arch/riscv/include/asm/qos.h b/arch/riscv/include/asm/qos= .h >> > +static inline void __switch_to_srmcfg(struct task_struct *next) >> > +{ >> > + u32 *cpu_srmcfg_ptr =3D this_cpu_ptr(&cpu_srmcfg); >> > + u32 thread_srmcfg; >> > + >> > + thread_srmcfg =3D READ_ONCE(next->thread.srmcfg); >> > + >> > + if (thread_srmcfg !=3D *cpu_srmcfg_ptr) { >>=20 >> Wouldn't prev->thread.srmcfg have the value of CSR_SRMCFG when executing >> switch_to? > > Thanks for reviewing. Yes, you are right that prev->thread.srmcfg should > have same value as CSR_SRMCFG. Are you suggesting that the cpu_srmcfg is > not necessary as prev->thread.srmcfg should have same value? Yes, it would be more consistent with other context switched state. I just wasn't sure if srmcfg doesn't have special race conditions. Thanks.