From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-181.mta1.migadu.com (out-181.mta1.migadu.com [95.215.58.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB15732C943 for ; Mon, 5 Jan 2026 18:03:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.181 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767636241; cv=none; b=FdeO1B2/sz2Cgy8rKm2cLjThkFT0KC9JCzYTSjs+/eXJT1XZUGBcXnI3NhOISOcWjJRJzZtRzQgvP0rLq3Q76lbgub4zD47haQjUENe3knGtcUXZ52p0rZUI0XaC8lzxfJermZ1y+0N3sKZV7E0d67BuqNOlpw92oT57D3uLfHk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767636241; c=relaxed/simple; bh=WoMNd1/Cui8NM6R8fdYR/aghuCtwoQ3S8r7gQqk3qhI=; h=Mime-Version:Content-Type:Date:Message-Id:Cc:Subject:From:To: References:In-Reply-To; b=suKhQWKQ9TGBywxhcIdfT7GU7z5ZHrT0Yx+qniQcDQd3AWMH97SF31PYokRtDU2+ea8EQFKg77Sf3Dz2OGQjatuIxJtmR3h1O4OJFyPWIsFl6L1nrtmtYobNmhkNoUSonpTdvBognM124N8TXU3duMAUebmCnBHrBEtzjtxUoM8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=cknow-tech.com; spf=pass smtp.mailfrom=cknow-tech.com; dkim=pass (2048-bit key) header.d=cknow-tech.com header.i=@cknow-tech.com header.b=kMajOfcd; arc=none smtp.client-ip=95.215.58.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=cknow-tech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cknow-tech.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cknow-tech.com header.i=@cknow-tech.com header.b="kMajOfcd" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cknow-tech.com; s=key1; t=1767636235; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cAA+oxavMgc4zkXOGFmiSvR8+PD1TtQP41ZqvlXUThs=; b=kMajOfcdtk45xWH0kGb3b41xCo1bO+xiDbACL0VyqrPG3w9btouiEBdZv+LwWEoIP7MJ8B USaCShheXrvb1lw/XI10J/HOyAnqobbaXhuxDOXAnuuUeAcKVeggBwiSxEICCQNPb8tpEB MaRwhBriswMcj17ycDs2ygwaOe4tlBRKJAm9VwhcKS6XhawGN33GGWsHUMhgJP26wCM6SF Mh717+XFhjTJ5JctfLAGzs3VQRutSF6GwyfYMJrKM+Ns1JPRf4hjYa0PYNncc4881I/BP+ TtmkYBi+dp6ojwdq/YSbEKTNOR6am64xFn7uTFDk49IRSjkyC4fP8C8uZ8e1zQ== Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 05 Jan 2026 19:03:32 +0100 Message-Id: Cc: , , , , Subject: Re: [PATCH 0/4] Add HDMI 2.0 support to DW HDMI QP TX X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: "Diederik de Haas" To: "Cristian Ciocaltea" , "Andrzej Hajda" , "Neil Armstrong" , "Robert Foss" , "Laurent Pinchart" , "Jonas Karlman" , "Jernej Skrabec" , "Maarten Lankhorst" , "Maxime Ripard" , "Thomas Zimmermann" , "David Airlie" , "Simona Vetter" , "Sandy Huang" , =?utf-8?q?Heiko_St=C3=BCbner?= , "Andy Yan" References: <20251203-dw-hdmi-qp-scramb-v1-0-836fe7401a69@collabora.com> In-Reply-To: <20251203-dw-hdmi-qp-scramb-v1-0-836fe7401a69@collabora.com> X-Migadu-Flow: FLOW_OUT On Wed Dec 3, 2025 at 7:27 PM CET, Cristian Ciocaltea wrote: > This patch series provides the missing support for high TMDS clock ratio > and scrambling to DW HDMI QP TX library, required for handling HDMI 2.0 > display modes on RK3576 & RK3588 SoCs. I tested this patch set with my 4K TV and Rock 5B and without it I did not see 4K@60, only 4K@30. With this patch set also a number of 4K related display settings appeared which were not there without it. So thanks a lot for this patch set. Feel free to add: Tested-by: Diederik de Haas Cheers, Diederik > In order to allow addressing the SCDC status lost on sink disconnects, > it adds an atomic variant of the drm_bridge_funcs.detect callback and a > new drm_bridge_detect_ctx() helper, which is further used in > drm_bridge_connector to switch to ->detect_ctx hook. > > Furthermore, optimize HPD event handling in dw_hdmi_qp Rockchip platform > driver to run the detect cycle on the affected connector only. > > Signed-off-by: Cristian Ciocaltea > --- > Cristian Ciocaltea (4): > drm/bridge: Add ->detect_ctx hook and drm_bridge_detect_ctx() > drm/bridge-connector: Switch to using ->detect_ctx hook > drm/bridge: dw-hdmi-qp: Add high TMDS clock ratio and scrambling su= pport > drm/rockchip: dw_hdmi_qp: Do not send HPD events for all connectors > > drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 174 +++++++++++++++++++= ++++-- > drivers/gpu/drm/display/drm_bridge_connector.c | 73 ++++++----- > drivers/gpu/drm/drm_bridge.c | 58 +++++++++ > drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 44 +++---- > include/drm/drm_bridge.h | 30 +++++ > 5 files changed, 308 insertions(+), 71 deletions(-) > --- > base-commit: ac5b392a8c355001c4c3f230a0e4b1f904e359ca > change-id: 20251203-dw-hdmi-qp-scramb-cdbd8b57ccf9 > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip