From: "Luca Ceresoli" <luca.ceresoli@bootlin.com>
To: "Luca Ceresoli" <luca.ceresoli@bootlin.com>,
"Andrzej Hajda" <andrzej.hajda@intel.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Robert Foss" <rfoss@kernel.org>,
"Laurent Pinchart" <Laurent.pinchart@ideasonboard.com>,
"Jonas Karlman" <jonas@kwiboo.se>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Frieder Schrempf" <frieder.schrempf@kontron.de>,
"Marek Vasut" <marex@denx.de>,
"Linus Walleij" <linusw@kernel.org>
Cc: "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
<dri-devel@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] drm/bridge: ti-sn65dsi83: add test pattern generation support
Date: Fri, 27 Feb 2026 13:57:17 +0100 [thread overview]
Message-ID: <DGPRF3KPMHI8.1TDPMKMCB4VSB@bootlin.com> (raw)
In-Reply-To: <20260226-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v1-3-2e15f5a9a6a0@bootlin.com>
Hello,
On Thu Feb 26, 2026 at 5:16 PM CET, Luca Ceresoli wrote:
> Generation of a test pattern output is a useful tool for panel bringup and
> debugging, and very simple to support with this chip.
>
> The value of REG_VID_CHA_ACTIVE_LINE_LENGTH_LOW needs to be divided by two
> for the test pattern to work in dual LVDS mode. While not clearly stated in
> the datasheet, this is needed according to the DSI Tuner [0] output. And
> some dual-LVDS panels refuse to show any picture without this division by
> two.
>
> [0] https://www.ti.com/tool/DSI-TUNER
>
> Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
I just noticed a small glitch in the implementation.
> +static bool sn65dsi83_test_pattern;
> +module_param_named(test_pattern, sn65dsi83_test_pattern, bool, 0644);
> +
> enum sn65dsi83_channel {
> CHANNEL_A,
> CHANNEL_B
> @@ -645,7 +649,11 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
> REG_LVDS_LANE_CHB_LVDS_TERM : 0));
> regmap_write(ctx->regmap, REG_LVDS_CM, 0x00);
>
> - le16val = cpu_to_le16(mode->hdisplay);
> + /*
> + * Active line length needs to be halved for test pattern
> + * generation in dual LVDS output.
> + */
> + le16val = cpu_to_le16(mode->hdisplay / (sn65dsi83_test_pattern ? 2 : 1));
In case sn65dsi83_test_pattern is changed from user space after this
cpu_to_le16()...
> regmap_bulk_write(ctx->regmap, REG_VID_CHA_ACTIVE_LINE_LENGTH_LOW,
> &le16val, 2);
> le16val = cpu_to_le16(mode->vdisplay);
> @@ -668,7 +676,8 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
> (mode->hsync_start - mode->hdisplay) / dual_factor);
> regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_FRONT_PORCH,
> mode->vsync_start - mode->vdisplay);
> - regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, 0x00);
> + regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN,
> + sn65dsi83_test_pattern ? REG_VID_CHA_TEST_PATTERN_EN : 0);
...but before this regmap_write(), the two registers affected by
sn65dsi83_test_pattern would be written with inconsistent values.
I'm resending with that fixed.
Luca
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2026-02-27 12:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-26 16:16 [PATCH 0/3] drm/bridge: ti-sn65dsi83: two fixes + add test pattern Luca Ceresoli
2026-02-26 16:16 ` [PATCH 1/3] drm/bridge: ti-sn65dsi83: fix CHA_DSI_CLK_RANGE rounding Luca Ceresoli
2026-02-27 10:39 ` Marek Vasut
2026-04-08 15:32 ` Louis Chauvet
2026-02-26 16:16 ` [PATCH 2/3] drm/bridge: ti-sn65dsi83: halve horizontal syncs for dual LVDS output Luca Ceresoli
2026-02-27 10:41 ` Marek Vasut
2026-04-08 15:34 ` Louis Chauvet
2026-02-26 16:16 ` [PATCH 3/3] drm/bridge: ti-sn65dsi83: add test pattern generation support Luca Ceresoli
2026-02-27 10:41 ` Marek Vasut
2026-02-27 10:57 ` Maxime Ripard
2026-02-27 12:58 ` Luca Ceresoli
2026-02-27 12:57 ` Luca Ceresoli [this message]
2026-04-08 15:40 ` Louis Chauvet
2026-04-08 16:13 ` Luca Ceresoli
2026-03-09 22:11 ` (subset) [PATCH 0/3] drm/bridge: ti-sn65dsi83: two fixes + add test pattern Luca Ceresoli
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