On Tue May 5, 2026 at 6:05 PM CEST, Pratyush Yadav wrote:
> On Fri, Apr 03 2026, Miquel Raynal wrote:
>
>> There are many helpers already to either read and/or write SR and/or CR,
>> as well as sometimes check the returned values. In order to be able to
>> switch from a 1 byte status register to a 2 bytes status register while
>> keeping the same level of verification, let's introduce a new helper
>> that writes them both (atomically) and then reads them back (separated)
>> to compare the values.
>>
>> In case 2 bytes registers are not supported, we still have the usual
>> fallback available in the helper being exported to the rest of the core.
>>
>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
>
> I'm confused. Doesn't spi_nor_write_16bit_sr_and_check() do the same
> thing? How are these two different?

So I've never come around to finish reviewing this series due to
personal reasons, but here are my remarks. Personally, I really
don't like all these multiple helpers doing almost the same thing.
But it is what is is for now.

Back when reviewing this series, I've digged into this and it mostly
evolve around how to enable the QE bit, that is defined in the 15th
SFDP DWORD. One could see how we could consolidate all the status
register handling in one function which are then called by the
different (specified) quad_enable helpers.

-michael