From: "Junhui Liu" <junhui.liu@pigmoral.tech>
To: "Junhui Liu" <junhui.liu@pigmoral.tech>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Brian Masney" <bmasney@redhat.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@kernel.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Richard Cochran" <richardcochran@gmail.com>
Cc: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-sunxi@lists.linux.dev>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, <netdev@vger.kernel.org>,
"Jerome Brunet" <jbrunet@baylibre.com>
Subject: Re: [PATCH v2 6/8] clk: sunxi-ng: a733: Add mod clocks support
Date: Sun, 12 Jul 2026 22:25:39 +0800 [thread overview]
Message-ID: <DJWNUAW00DTS.1L26UVJEYHZ0L@pigmoral.tech> (raw)
In-Reply-To: <20260711-a733-clk-v2-6-974d188cbe0c@pigmoral.tech>
On Sat Jul 11, 2026 at 4:10 PM CST, Junhui Liu wrote:
[...]
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer0_clk, "timer0", timer_parents, 0x800,
I will update these to SUNXI_CCU_P_DATA_WITH_MUX_GATE in next version.
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer1_clk, "timer1", timer_parents, 0x804,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer2_clk, "timer2", timer_parents, 0x808,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer3_clk, "timer3", timer_parents, 0x80c,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer4_clk, "timer4", timer_parents, 0x810,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer5_clk, "timer5", timer_parents, 0x814,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer6_clk, "timer6", timer_parents, 0x818,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer7_clk, "timer7", timer_parents, 0x81c,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer8_clk, "timer8", timer_parents, 0x820,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
> +static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(timer9_clk, "timer9", timer_parents, 0x824,
> + 0, 0, /* no M */
> + 0, 3, /* P */
> + 24, 3, /* mux */
> + BIT(31), /* gate */
> + 0);
[...]
--
Best regards,
Junhui Liu
next prev parent reply other threads:[~2026-07-12 14:41 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-11 8:10 [PATCH v2 0/8] clk: sunxi-ng: Add support for Allwinner A733 CCU and PRCM Junhui Liu
2026-07-11 8:10 ` [PATCH v2 1/8] dt-bindings: clk: sun60i-a733-ccu: Add allwinner A733 support Junhui Liu
2026-07-12 14:35 ` Krzysztof Kozlowski
2026-07-11 8:10 ` [PATCH v2 2/8] clk: sunxi-ng: sdm: Add dual patterns support Junhui Liu
2026-07-11 8:10 ` [PATCH v2 3/8] clk: sunxi-ng: a733: Add PRCM CCU Junhui Liu
2026-07-11 8:10 ` [PATCH v2 4/8] clk: sunxi-ng: a733: Add PLL clocks support Junhui Liu
2026-07-11 8:10 ` [PATCH v2 5/8] clk: sunxi-ng: a733: Add bus " Junhui Liu
2026-07-11 8:10 ` [PATCH v2 6/8] clk: sunxi-ng: a733: Add mod " Junhui Liu
2026-07-12 14:25 ` Junhui Liu [this message]
2026-07-11 8:10 ` [PATCH v2 7/8] clk: sunxi-ng: a733: Add bus clock gates Junhui Liu
2026-07-12 14:29 ` Junhui Liu
2026-07-11 8:10 ` [PATCH v2 8/8] clk: sunxi-ng: a733: Add reset lines Junhui Liu
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