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* Re: [FAQ?] More ram=less performance (maximum cacheable RAM)
@ 2001-08-22  9:49 Samium Gromoff
  0 siblings, 0 replies; 12+ messages in thread
From: Samium Gromoff @ 2001-08-22  9:49 UTC (permalink / raw)
  To: m.luca; +Cc: linux-kernel

>
> > It also has nothing to do with Linux.  Some >motherboard's TAG RAM do not
> > allow for caching more than xMB.
>
> I'm just proposing to update the FAQ to help people >like me
> that thinking to gain speed doubling the system ram >have seen
> a severe performance drop for certain task like >compiling the
> kernel .

 yes, it have nothing to do with linux, but if we can
 improve linux behaviour in the case, i think we should
do it (so in the zone approach people even wouldn`t bother) ...


--


cheers,


   Samium Gromoff

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [FAQ?] More ram=less performance (maximum cacheable RAM)
@ 2001-08-21 22:01 Samium Gromoff
  0 siblings, 0 replies; 12+ messages in thread
From: Samium Gromoff @ 2001-08-21 22:01 UTC (permalink / raw)
  To: linux-kernel

> Patch and other info about non cacheable ram here :
> http://www.keryan.org/brad/slram/
>
> ciao,
> luca
    hi guys, the mentioned patch idea is a great one,
  i think, in the light of the situation with only
  512 Mb RAM cached with P2 (as mentioned above)...

  at least detection of uncached RAM is a must.

  should anybody port the patch to 2.4?
(there is still alot of people which use PI`s...),
and using uncached RAM as swap actually will increase
spped, rather than decrease it...

though, there is an other solution: 
allocate the tail as zones marked slow.

comments people?

---


cheers,


   Samium Gromoff

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [FAQ?] More ram=less performance (maximum cacheable RAM)
@ 2001-08-21 19:42 Luca Montecchiani
  2001-08-21 19:57 ` Richard Gooch
  0 siblings, 1 reply; 12+ messages in thread
From: Luca Montecchiani @ 2001-08-21 19:42 UTC (permalink / raw)
  To: Richard Gooch; +Cc: Linux Kernel

I've recently updated my K6-2 from 128 to 256mbytes (2x128 pc133 dimms)
compiling kernel take now 13 minutes instead of 9 minutes :(

Ram is so cheap and socket7 is far from the death, time for a FAQ?

Here some description from http://9-muses.com/freak/reviews/super7.shtml :
The Level2 Cache determines the board's maximum cacheable RAM. 
Boards equipped with 512k can cache up to 128MB of RAM while
those equipped with 1MB can handle up to 256MB of RAM. If you're using all
of the RAM cacheable by the the L2 cache, performance is enhanced. Once you
go above the maximum cacheable RAM, performance is lost. What this means to
you is the more cache the better. For some users, 64MB or even 128MB of RAM
is enough, but who knows, somewhere down the road, you might want to upgrade
to 256MB. It's nice to know your board can handle the extra memory without
worrying about losing performance.

More technical information can be found here :
http://www.pcguide.com/ref/mbsys/cache/char_Cacheability.htm

Patch and other info about non cacheable ram here :
http://www.keryan.org/brad/slram/

ciao,
luca
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^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2001-08-28 14:23 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2001-08-22  9:49 [FAQ?] More ram=less performance (maximum cacheable RAM) Samium Gromoff
  -- strict thread matches above, loose matches on Subject: below --
2001-08-21 22:01 Samium Gromoff
2001-08-21 19:42 Luca Montecchiani
2001-08-21 19:57 ` Richard Gooch
2001-08-21 20:38   ` Luca Montecchiani
2001-08-21 21:53   ` Robert Love
2001-08-22  6:27     ` Luca Montecchiani
2001-08-22 11:12       ` Wakko Warner
2001-08-22 21:26         ` idalton
2001-08-23  5:19       ` Richard Gooch
2001-08-23 11:35         ` Luca Montecchiani
2001-08-28 14:23   ` Holger Lubitz

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