From: "Petr Vandrovec" <VANDROVE@vc.cvut.cz>
To: "Richard B. Johnson" <root@chaos.analogic.com>
Cc: Andi Kleen <ak@suse.de>,
"Maciej W. Rozycki" <macro@ds2.pg.gda.pl>,
linux-kernel@vger.kernel.org
Subject: Re: Why is double_fault serviced by a trap gate?
Date: Thu, 7 Dec 2000 23:01:14 MET-1 [thread overview]
Message-ID: <F0595854FC8@vcnet.vc.cvut.cz> (raw)
On 7 Dec 00 at 16:44, Richard B. Johnson wrote:
> On Thu, 7 Dec 2000 richardj_moore@uk.ibm.com wrote:
>
> > Which surely we can on today's x86 systems. Even back in the days of OS/2
> > 2.0 running on a 386 with 4Mb RAM we used a taskgate for both NMI and
> > Double Fault. You need only a minimal stack - 1K, sufficient to save state
> > and restore ESP to a known point before switching back to the main TSS to
> > allow normal exception handling to occur.
> >
> > There no architectural restriction that some folks have hinted at - as long
> > as the DPL for the task gates is 3.
> >
> [SNIPPED...]
>
> Please refer to page 6-16, Inter486 Microprocessor Family Programmer's
> Reference Manual.
>
> The specifc text is: "The TSS does not have a stack pointer for a
> privilege level 3 stack, because the procedure cannot be called by a less
> privileged procedure. The stack for privilege level 3 is preserved by the
> contents of SS and EIP registers which have been saved on the stack
> of the privilege level called from level 3".
>
> What this means is that a stack-fault in level 3 will kill you no
> matter how cute you try to be. And, putting a task gate as call
> procedure entry from a trap or fault is just trying to be cute.
> It's extra code that will result in the same processor reset.
You misunderstand. There is no SS/ESP for level 3, because of you cannot
switch to CPL 3 using CALL/JMP, you can switch to it only through IRET/RETF.
And both of them fetch new SS/ESP from stack...
If stack-fault happens on CPL3, CPU switches to CPL0 (as defined by
stack fault trap gate), executes appropriate code, and then returns
back to CPL3 through IRET.
Maybe you forgot when reading this, that CPL3 is non-priviledged level,
and CPL0 has most of priviledges.
Problem with doublefault is that if you overflowed CPL0 stack, you just
cannot service this error on same stack, you must switch to another one.
And only way to switch out from CPL0 stack during fault service is
hardware switch to another TSS.
In either case, nothing is ever pushed into old stack, so doing
movl $0,%esp
does not matter. With userspace never, in kernel if you have task gate
for doublefault... In userspace it will not even crash until you send some
signal to that process, or until you'll execute some call/push/pop yourself.
Petr Vandrovec
vandrove@vc.cvut.cz
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next reply other threads:[~2000-12-07 22:32 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-12-07 23:01 Petr Vandrovec [this message]
-- strict thread matches above, loose matches on Subject: below --
2000-12-09 23:46 Why is double_fault serviced by a trap gate? richardj_moore
2000-12-08 20:48 richardj_moore
2000-12-08 16:34 richardj_moore
2000-12-08 16:52 ` Richard B. Johnson
2000-12-08 13:18 richardj_moore
2000-12-08 8:37 richardj_moore
2000-12-08 12:58 ` Richard B. Johnson
2000-12-08 22:34 ` Keith Owens
2000-12-08 20:31 ` Mikulas Patocka
2000-12-07 23:08 richardj_moore
2000-12-07 23:03 richardj_moore
2000-12-07 21:09 richardj_moore
2000-12-07 21:44 ` Richard B. Johnson
2000-12-07 22:36 ` Brian Gerst
2000-12-08 1:36 ` Richard B. Johnson
2000-12-08 11:44 ` Maciej W. Rozycki
2000-12-07 22:47 ` Keith Owens
2000-12-08 11:30 ` Maciej W. Rozycki
2000-12-07 20:20 Petr Vandrovec
2000-12-07 19:38 ` Maciej W. Rozycki
2000-12-07 18:13 Petr Vandrovec
2000-12-07 18:04 ` Maciej W. Rozycki
2000-12-07 16:04 richardj_moore
2000-12-07 16:13 ` Andi Kleen
2000-12-07 16:31 ` Richard B. Johnson
2000-12-07 16:55 ` Maciej W. Rozycki
2000-12-07 18:05 ` Andi Kleen
2000-12-07 18:11 ` Maciej W. Rozycki
2000-12-07 18:29 ` Andi Kleen
2000-12-07 18:47 ` Maciej W. Rozycki
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