From: Peter Zijlstra <peterz@infradead.org>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: Steven Rostedt <rostedt@goodmis.org>,
"H . Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Olivier Dion <odion@efficios.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Jiri Kosina <jkosina@suse.cz>,
Masami Hiramatsu <mhiramat@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>
Subject: Re: Official documentation from Intel stating that poking INT3 (single-byte) concurrently is OK ?
Date: Wed, 22 Feb 2023 10:20:48 +0100 [thread overview]
Message-ID: <Y/XecPdgpG0Cx+gX@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <5774aace-23f3-c53d-8e65-b90b588dbbe3@efficios.com>
On Tue, Feb 21, 2023 at 01:42:58PM -0500, Mathieu Desnoyers wrote:
> On 2023-02-21 12:50, Steven Rostedt wrote:
> > On Tue, 21 Feb 2023 11:44:42 -0500
> > Mathieu Desnoyers <mathieu.desnoyers@efficios.com> wrote:
> >
> > > Hi Peter,
> > >
> > > I have emails from you dating from a few years back unofficially stating
> > > that it's OK to update the first byte of an instruction with a single-byte
> > > int3 concurrently:
> > >
> > > https://lkml.indiana.edu/hypermail/linux/kernel/1001.1/01530.html
> > >
> > > It is referred in the original implementation of text_poke_bp():
> > > commit fd4363fff3d9 ("x86: Introduce int3 (breakpoint)-based instruction patching")
> > >
> > > Olivier Dion is working on the libpatch [1,2] project aiming to use this
> > > property for low-latency/low-overhead live code patching in user-space as
> > > well, but we cannot find an official statement from Intel that guarantees
> > > this breakpoint-bypass technique is indeed OK without stopping the world
> > > while patching.
> > >
> > > Do you know where I could find an official statement of this guarantee ?
> > >
> >
> > The fact that we have been using it for over 10 years without issue should
> > be a good guarantee ;-)
> >
> > I know you probably prefer an official statement, and I thought they
> > actually gave one, but can't seem to find it.
>
> I recall an in-person discussion with Peter Anvin shortly after he got the
> official confirmation, but I cannot find any public trace of it. I suspect
> Intel may have documented this internally only.
My 2ct, ISTR this also having been vetted by AMD, perhaps they did
manage to write it down somewhere.
next prev parent reply other threads:[~2023-02-22 9:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-21 16:44 Official documentation from Intel stating that poking INT3 (single-byte) concurrently is OK ? Mathieu Desnoyers
2023-02-21 17:50 ` Steven Rostedt
2023-02-21 18:42 ` Mathieu Desnoyers
2023-02-22 9:20 ` Peter Zijlstra [this message]
2023-02-22 16:41 ` Mathieu Desnoyers
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