From: Johan Hovold <johan@kernel.org>
To: Abel Vesa <abel.vesa@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Johan Hovold" <johan+linaro@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 11/11] arm64: dts: qcom: sm8550: Fix PCIe PHYs and controllers nodes
Date: Wed, 8 Feb 2023 18:02:43 +0100 [thread overview]
Message-ID: <Y+PVs8JFKVslbELE@hovoldconsulting.com> (raw)
In-Reply-To: <20230206212619.3218741-12-abel.vesa@linaro.org>
On Mon, Feb 06, 2023 at 11:26:19PM +0200, Abel Vesa wrote:
> First, move the pinctrl related propeties out from SoC dtsi and into the
> board dts and add blank lines before status properties in the PHY nodes
> to be consistent with the rest of the nodes. Then drop the pipe clock
> from the controller nodes. Rename the aggre0 and aggre1 clocks to more
> generic noc_aggr. Add the cpu-pcie interconnects to both controller nodes.
> Rename the pcie1 second reset to link_down and drop the unnecessary
> enable-gpios. Switch the aux clock to GCC_PCIE_1_PHY_AUX_CLK for the pcie1
> PHY and drop the aux_phy from clock-names. Also rename the nocsr reset to
> phy_nocsr. With this changes we are now in line with the SC8280XP bindings.
>
> Fixes: 98a4dc3a78fa ("arm64: dts: qcom: sm8550: Add PCIe PHYs and controllers nodes")
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> This time, this patch actually fixes the already merged PCIe related
> nodes. When compared to the earlier version of this patchset, this patch
> leads to the PCIe nodes looking the same. Sorry for all this mess.
Looks good now.
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
prev parent reply other threads:[~2023-02-08 17:02 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-06 21:26 [PATCH v8 00/11] sm8550: Add PCIe HC and PHY support Abel Vesa
2023-02-06 21:26 ` [PATCH v8 01/11] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 Abel Vesa
2023-02-06 21:26 ` [PATCH v8 02/11] phy: qcom-qmp: pcs: Add v6 register offsets Abel Vesa
2023-02-06 21:26 ` [PATCH v8 03/11] phy: qcom-qmp: pcs: Add v6.20 " Abel Vesa
2023-02-06 21:26 ` [PATCH v8 04/11] phy: qcom-qmp: pcs-pcie: Add v6 " Abel Vesa
2023-02-06 21:26 ` [PATCH v8 05/11] phy: qcom-qmp: pcs-pcie: Add v6.20 " Abel Vesa
2023-02-06 21:26 ` [PATCH v8 06/11] phy: qcom-qmp: qserdes-txrx: " Abel Vesa
2023-02-06 21:26 ` [PATCH v8 07/11] phy: qcom-qmp: qserdes-lane-shared: Add v6 " Abel Vesa
2023-02-06 21:26 ` [PATCH v8 08/11] phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs Abel Vesa
2023-02-08 16:48 ` Johan Hovold
2023-02-06 21:26 ` [PATCH v8 09/11] dt-bindings: PCI: qcom: Add SM8550 compatible Abel Vesa
2023-02-06 21:26 ` [PATCH v8 10/11] PCI: qcom: Add SM8550 PCIe support Abel Vesa
2023-02-08 16:58 ` Johan Hovold
2023-02-06 21:26 ` [PATCH v8 11/11] arm64: dts: qcom: sm8550: Fix PCIe PHYs and controllers nodes Abel Vesa
2023-02-08 17:02 ` Johan Hovold [this message]
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