From: Sean Christopherson <seanjc@google.com>
To: Jim Mattson <jmattson@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H . Peter Anvin" <hpa@zytor.com>,
Paolo Bonzini <pbonzini@redhat.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v2 3/3] KVM: SVM: Unconditionally enumerate EferLmsleUnsupported
Date: Fri, 7 Oct 2022 22:41:21 +0000 [thread overview]
Message-ID: <Y0CrER/yiHheWiZw@google.com> (raw)
In-Reply-To: <20220920205922.1564814-4-jmattson@google.com>
On Tue, Sep 20, 2022, Jim Mattson wrote:
> CPUID.80000008H:EDX.EferLmsleUnsupported[bit 20] indicates that
> IA32_EFER.LMSLE[bit 13] is unsupported and must be zero.
>
> KVM doesn't support "Long Mode Segment Limit Enable," even if the
> underlying physical processor does, so set that bit in the guest CPUID
> table returned by KVM_GET_SUPPORTED_CPUID.
>
> Signed-off-by: Jim Mattson <jmattson@google.com>
> ---
> arch/x86/kvm/svm/svm.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index 3af360fe21e6..0bf6ac51f097 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -4945,6 +4945,7 @@ static __init void svm_set_cpu_caps(void)
> if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) ||
> boot_cpu_has(X86_FEATURE_AMD_SSBD))
> kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD);
> + kvm_cpu_cap_set(X86_FEATURE_NO_LMSLE);
This can go in common x86 code, e.g. if someone wants to run an AMD VM on Intel
hardware.
Side topic, in the context of this series, the below diff highlights how silly it
is for PSFD to be banished from cpufeatures.h. While we have Boris's attention
(and ACK!), can you tack on a patch to move drop KVM_X86_FEATURE_PSFD and move the
bit to cpufeatures.h where it belongs?
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -696,6 +696,7 @@ void kvm_set_cpu_caps(void)
F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON) |
__feature_bit(KVM_X86_FEATURE_PSFD)
);
+ kvm_cpu_cap_set(X86_FEATURE_NO_LMSLE);
/*
* AMD has separate bits for each SPEC_CTRL bit.
next prev parent reply other threads:[~2022-10-07 22:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-20 20:59 [PATCH v2 0/3] KVM: EFER.LMSLE cleanup Jim Mattson
2022-09-20 20:59 ` [PATCH v2 1/3] Revert "KVM: SVM: Allow EFER.LMSLE to be set with nested svm" Jim Mattson
2022-09-20 20:59 ` [PATCH v2 2/3] x86/cpufeatures: Introduce X86_FEATURE_NO_LMSLE Jim Mattson
2022-09-21 16:07 ` Borislav Petkov
2022-09-20 20:59 ` [PATCH v2 3/3] KVM: SVM: Unconditionally enumerate EferLmsleUnsupported Jim Mattson
2022-10-07 22:41 ` Sean Christopherson [this message]
2022-09-20 21:17 ` [PATCH v2 0/3] KVM: EFER.LMSLE cleanup Borislav Petkov
2022-09-20 21:36 ` Sean Christopherson
2022-09-20 21:36 ` Jim Mattson
2022-09-21 9:28 ` Borislav Petkov
2022-09-21 13:45 ` Jim Mattson
2022-09-21 13:54 ` Borislav Petkov
2022-09-21 15:11 ` Jim Mattson
2022-09-21 16:06 ` Borislav Petkov
2022-09-21 16:23 ` Jim Mattson
2022-09-21 17:11 ` Borislav Petkov
2022-09-21 17:45 ` Jim Mattson
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