From: Andrew Lunn <andrew@lunn.ch>
To: Raju Lakkaraju <Raju.Lakkaraju@microchip.com>
Cc: netdev@vger.kernel.org, davem@davemloft.net, kuba@kernel.org,
linux-kernel@vger.kernel.org, bryan.whitehead@microchip.com,
edumazet@google.com, pabeni@redhat.com,
UNGLinuxDriver@microchip.com
Subject: Re: [PATCH net-next V3] net: lan743x: Add support to SGMII register dump for PCI11010/PCI11414 chips
Date: Mon, 10 Oct 2022 21:35:35 +0200 [thread overview]
Message-ID: <Y0R0B0sOzjOTIM66@lunn.ch> (raw)
In-Reply-To: <20221003103821.4356-1-Raju.Lakkaraju@microchip.com>
> static int lan743x_get_regs_len(struct net_device *dev)
> {
> - return MAX_LAN743X_ETH_REGS * sizeof(u32);
> + struct lan743x_adapter *adapter = netdev_priv(dev);
> + u32 num_regs = MAX_LAN743X_ETH_COMMON_REGS;
> +
> + if (adapter->is_sgmii_en)
> + num_regs += MAX_LAN743X_ETH_SGMII_REGS;
> +
> + return num_regs * sizeof(u32);
> }
>
> static void lan743x_get_regs(struct net_device *dev,
> struct ethtool_regs *regs, void *p)
> {
> + struct lan743x_adapter *adapter = netdev_priv(dev);
> + int regs_len;
> +
> + regs_len = lan743x_get_regs_len(dev);
> + memset(p, 0, regs_len);
> +
> regs->version = LAN743X_ETH_REG_VERSION;
> + regs->len = regs_len;
> +
> + lan743x_common_regs(dev, p);
> + p = (u32 *)p + MAX_LAN743X_ETH_COMMON_REGS;
>
> - lan743x_common_regs(dev, regs, p);
> + if (adapter->is_sgmii_en) {
> + lan743x_sgmii_regs(dev, p);
> + p = (u32 *)p + MAX_LAN743X_ETH_SGMII_REGS;
> + }
This seems O.K. for the moment, but how does it work when you add the
next set of optional registers? Say you want to add the PTP registers?
One idea might be to use the LAN743X_ETH_REG_VERSION as a
bitfield. Bit 0 indicates the common registers are present. Bit 1
indicates the SGMII registers are present. Bit 2 is for whatever next
set of optional registers you add, say PTP.
Andrew
next prev parent reply other threads:[~2022-10-10 19:35 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-03 10:38 [PATCH net-next V3] net: lan743x: Add support to SGMII register dump for PCI11010/PCI11414 chips Raju Lakkaraju
2022-10-04 0:31 ` Jakub Kicinski
2022-10-10 19:35 ` Andrew Lunn [this message]
2022-10-12 5:02 ` Raju Lakkaraju
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