From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6186C433FE for ; Wed, 12 Oct 2022 13:29:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230028AbiJLN26 (ORCPT ); Wed, 12 Oct 2022 09:28:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229994AbiJLN2x (ORCPT ); Wed, 12 Oct 2022 09:28:53 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F340FCE99B for ; Wed, 12 Oct 2022 06:28:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1665581328; x=1697117328; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=zLOMPQX/UZ2BIcOn/66Oe03IRbrUXRGhlWZylqU+JUI=; b=ioJbApTeaFfBm5pm0/wfyuY1SCMuV0luW09mCyFK8ad87AMFVnvk/ZUV uctVD954f9bZZDnRId7q7Pz6ZzlDtNA+G0Lqwc1C+xHOW+bCsy5I4kPVq rOzNdEJKhkq6d3rHXVwTYT1UxKeT+heHnieVmU9juvIfu86PqAwn9hqS5 gGJ3gAJp7gSg8+1E811QL80SjsSbT+/vuo2GpZbFTGb4RW95Lsm5niTZa 6ieRCdvtIanXz42ZLbSk8jvYoTEjcQKi02vXKPh8TFdqNd0CwXE5CFOag fdGLUdoORL2uDW0VSqFLuAIi6JWuGPUf6VoayIUuPiIev3CPqg0PtJ4i6 w==; X-IronPort-AV: E=Sophos;i="5.95,179,1661842800"; d="scan'208";a="178371523" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Oct 2022 06:28:46 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 12 Oct 2022 06:28:41 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Wed, 12 Oct 2022 06:28:38 -0700 Date: Wed, 12 Oct 2022 14:28:16 +0100 From: Conor Dooley To: Jisheng Zhang CC: Peter Zijlstra , Josh Poimboeuf , Jason Baron , Steven Rostedt , Ard Biesheuvel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nathan Chancellor , Nick Desaulniers , Tom Rix , , , , Samuel Holland , Andrew Jones Subject: Re: [PATCH v2] riscv: jump_label: mark arguments as const to satisfy asm constraints Message-ID: References: <20221008145437.491-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20221008145437.491-1-jszhang@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hey Jisheng, LKP reported an error that seems to only have gone to myself & Samuel, but the branch it's complaining about is your v1: https://lore.kernel.org/lkml/202210122123.Cc4FPShJ-lkp@intel.com/ Any idea what the story is here? Thanks, Conor. On Sat, Oct 08, 2022 at 10:54:37PM +0800, Jisheng Zhang wrote: > Samuel reported that the static branch usage in cpu_relax() breaks > building with CONFIG_CC_OPTIMIZE_FOR_SIZE: > > In file included from : > ./arch/riscv/include/asm/jump_label.h: In function 'cpu_relax': > ././include/linux/compiler_types.h:285:33: warning: 'asm' operand 0 > probably does not match constraints > 285 | #define asm_volatile_goto(x...) asm goto(x) > | ^~~ > ./arch/riscv/include/asm/jump_label.h:41:9: note: in expansion of macro > 'asm_volatile_goto' > 41 | asm_volatile_goto( > | ^~~~~~~~~~~~~~~~~ > ././include/linux/compiler_types.h:285:33: error: impossible constraint > in 'asm' > 285 | #define asm_volatile_goto(x...) asm goto(x) > | ^~~ > ./arch/riscv/include/asm/jump_label.h:41:9: note: in expansion of macro > 'asm_volatile_goto' > 41 | asm_volatile_goto( > | ^~~~~~~~~~~~~~~~~ > make[1]: *** [scripts/Makefile.build:249: > arch/riscv/kernel/vdso/vgettimeofday.o] Error 1 > make: *** [arch/riscv/Makefile:128: vdso_prepare] Error 2 > > Maybe "-Os" prevents GCC from detecting that the key/branch arguments > can be treated as constants and used as immediate operands. Inspired > by x86's commit 864b435514b2("x86/jump_label: Mark arguments as const to > satisfy asm constraints"), and as pointed out by Steven: "The "i" > constraint needs to be a constant.", let's do similar modifications to > riscv. > > Tested by CC_OPTIMIZE_FOR_SIZE + gcc and CC_OPTIMIZE_FOR_SIZE + clang. > > Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ > Link: https://lore.kernel.org/all/20210212094059.5f8d05e8@gandalf.local.home/ > Fixes: 8eb060e10185 ("arch/riscv: add Zihintpause support") > Reported-by: Samuel Holland > Signed-off-by: Jisheng Zhang > Reviewed-by: Andrew Jones > --- > > since v1: > - add Reported-by, Reviewed-by, Fixes and Link tag > > arch/riscv/include/asm/jump_label.h | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/riscv/include/asm/jump_label.h b/arch/riscv/include/asm/jump_label.h > index 38af2ec7b9bf..6d58bbb5da46 100644 > --- a/arch/riscv/include/asm/jump_label.h > +++ b/arch/riscv/include/asm/jump_label.h > @@ -14,8 +14,8 @@ > > #define JUMP_LABEL_NOP_SIZE 4 > > -static __always_inline bool arch_static_branch(struct static_key *key, > - bool branch) > +static __always_inline bool arch_static_branch(struct static_key * const key, > + const bool branch) > { > asm_volatile_goto( > " .option push \n\t" > @@ -35,8 +35,8 @@ static __always_inline bool arch_static_branch(struct static_key *key, > return true; > } > > -static __always_inline bool arch_static_branch_jump(struct static_key *key, > - bool branch) > +static __always_inline bool arch_static_branch_jump(struct static_key * const key, > + const bool branch) > { > asm_volatile_goto( > " .option push \n\t" > -- > 2.37.2 >