From: Catalin Marinas <catalin.marinas@arm.com>
To: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, will@kernel.org,
Suzuki K Poulose <suzuki.poulose@arm.com>,
James Morse <james.morse@arm.com>,
Jonathan Corbet <corbet@lwn.net>,
Mark Rutland <mark.rutland@arm.com>,
linux-doc@vger.kernel.org
Subject: Re: [PATCH 2/2] arm64: errata: Workaround possible Cortex-A715 [ESR|FAR]_ELx corruption
Date: Fri, 11 Nov 2022 22:36:31 +0000 [thread overview]
Message-ID: <Y27Ob8aRX919Hhu0@arm.com> (raw)
In-Reply-To: <73c40107-0d7a-d988-c817-7bba6d72c371@arm.com>
On Thu, Nov 10, 2022 at 08:45:07AM +0530, Anshuman Khandual wrote:
> On 11/10/22 00:48, Catalin Marinas wrote:
> > On Thu, Oct 27, 2022 at 08:09:15AM +0530, Anshuman Khandual wrote:
> >> +#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
> >> +static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
> >> + unsigned long addr,
> >> + pte_t *ptep)
> >> +{
> >> + pte_t pte = ptep_get_and_clear(vma->vm_mm, addr, ptep);
> >>
> >> + if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_2645198)) {
> >> + /*
> >> + * Break-before-make (BBM) is required for all user space mappings
> >> + * when the permission changes from executable to non-executable
> >> + * in cases where cpu is affected with errata #2645198.
> >> + */
> >> + if (pte_user_exec(pte) && cpus_have_const_cap(ARM64_WORKAROUND_2645198))
> >> + __flush_tlb_range(vma, addr, addr + PAGE_SIZE, PAGE_SIZE, false, 3);
> >
> > Why not flush_tlb_page() here?
> >
> > But more importantly, can we not use ptep_clear_flush() instead (and
>
> Something like ...
>
> ptep_modify_prot_start -
>
> if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_2645198)) {
> if (pte_user_exec(READ_ONCE(*ptep)) && cpus_have_const_cap(ARM64_WORKAROUND_2645198))
> return ptep_clear_flush(vma, addr, ptep);
> } else {
> return ptep_get_and_clear(vma->vm_mm, addr, ptep);
> }
Yes, this should work but avoid the 'else' when you have a return, so
something like:
if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_2645198) &&
cpus_have_const_cap(ARM64_WORKAROUND_2645198) &&
pte_user_exec(READ_ONCE(*ptep)))
return ptep_clear_flush(vma, addr, ptep);
return ptep_get_and_clear(vma->vm_mm, addr, ptep);
> > huge_ptep_clear_flush())? They return the pte and do the TLBI.
>
> huge_ptep_modify_prot_start -
>
> if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_2645198)) {
> if (pte_user_exec(READ_ONCE(*ptep)) && cpus_have_const_cap(ARM64_WORKAROUND_2645198))
> return huge_ptep_clear_flush(vma, addr, ptep);
> } else {
> return huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
> }
>
> pte_user_exec(READ_ONCE(*ptep) should identify an user exec mapping even though
> ptep represents a cont PTE/PMD huge page ? OR should huge_ptep_get() helper be
> used instead ?
This should work as a shortcut. The contiguous ptes should all be the
same, so it's sufficient to check one of them.
--
Catalin
next prev parent reply other threads:[~2022-11-11 22:36 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 2:39 [PATCH 0/2] arm64: errata: Workaround Cortex-A715 errata #2645198 Anshuman Khandual
2022-10-27 2:39 ` [PATCH 1/2] arm64: Add Cortex-715 CPU part definition Anshuman Khandual
2022-10-27 2:39 ` [PATCH 2/2] arm64: errata: Workaround possible Cortex-A715 [ESR|FAR]_ELx corruption Anshuman Khandual
2022-11-09 19:18 ` Catalin Marinas
2022-11-10 3:15 ` Anshuman Khandual
2022-11-11 22:36 ` Catalin Marinas [this message]
2022-11-12 13:52 ` Anshuman Khandual
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